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README.md ht54123arz: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 19d ago

HT54123ARZ

HTCSEMI · Differential OpAmps · SOP-8

HT54123ARZ from HTCSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VR input Reference/negative differential amplifier input. Connected to the ZCT (Zero Current Transformer) secondary side (typically through resistor RL) and to the internal reference voltage generator via the feedback network. Sets the trip threshold together with VI.
2 VI input Signal/positive differential amplifier input from the ZCT secondary coil. Compared against VR by the internal differential amplifier (gain ~1000) to detect earth leakage current.
3 GND power_in Ground / negative supply return for the IC. Reference for VCC and all internal bias.
4 OD output Differential amplifier output. Provides the amplified ZCT signal; an external capacitor (C2, ~0.047 µF between OD and NR) is connected here to integrate the amplifier output. Typical IO(D) ~20 µA (VR-VI=30 mV, VOD=1.2 V).
5 SC output SCR gate drive output. Sources a ~0.4 mA output pulse (typ. 400 µA, up to 800 µA) to trigger the external SCR gate when the latch is activated, energizing the trip coil that opens the circuit breaker.
6 NR passive Noise-reduction / integration node. External capacitor to ground (typ. 0.047 µF C2) sets the integration time constant of the amplified signal to obtain adequate trip delay per KSC4613. A capacitor between pin 6 and pin 7 (~0.047 µF) may also be added when noise is high.
7 OS output Level comparator / latch output. Presents the pulse signal after the internal latch circuit; used with an external capacitor (C3, ~0.047 µF) and drives (through the latch) the SC output that fires the SCR. Latch-on voltage typ. 1.0 V.
8 VCC power_in Positive supply pin, powered directly from the rectified AC line via series resistor RS and capacitor CS. Operating range 12-20 V (abs. max 20 V, ICC max 8 mA); internal Zener protection and voltage regulator provide the bias voltage. Typical ICC ~400 µA at VCC=12 V.

Key specifications

Parameter Value
Manufacturer HTCSEMI
Package SOP-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • HT54123ARZ
  • HT54123ARZSOP
  • HT54123ARZR
  • HT54123ARZDIP

CAD (KiCad official)

  • Symbol: HT54123ARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ht54123arz-etched.step / ht54123arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht54123arz.step / ht54123arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HTCSEMI datasheet (10 pp, sha256 7feefbbddc0101ef, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF