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Set visibility: public

Ray ·7629bc1883 ·28d ago ·parent 9b4cb10
1 file changed +9−6
page.json+9−6
@@ -50,31 +50,31 @@         "number": "4",         "name": "OD",         "type": "output",-        "description": "Differential amplifier output. Provides the amplified ZCT signal; an external capacitor (C2, ~0.047 \u00b5F between OD and NR) is connected here to integrate the amplifier output. Typical IO(D) ~20 \u00b5A (VR-VI=30 mV, VOD=1.2 V)."+        "description": "Differential amplifier output. Provides the amplified ZCT signal; an external capacitor (C2, ~0.047 µF between OD and NR) is connected here to integrate the amplifier output. Typical IO(D) ~20 µA (VR-VI=30 mV, VOD=1.2 V)."       },       {         "number": "5",         "name": "SC",         "type": "output",-        "description": "SCR gate drive output. Sources a ~0.4 mA output pulse (typ. 400 \u00b5A, up to 800 \u00b5A) to trigger the external SCR gate when the latch is activated, energizing the trip coil that opens the circuit breaker."+        "description": "SCR gate drive output. Sources a ~0.4 mA output pulse (typ. 400 µA, up to 800 µA) to trigger the external SCR gate when the latch is activated, energizing the trip coil that opens the circuit breaker."       },       {         "number": "6",         "name": "NR",         "type": "passive",-        "description": "Noise-reduction / integration node. External capacitor to ground (typ. 0.047 \u00b5F C2) sets the integration time constant of the amplified signal to obtain adequate trip delay per KSC4613. A capacitor between pin 6 and pin 7 (~0.047 \u00b5F) may also be added when noise is high."+        "description": "Noise-reduction / integration node. External capacitor to ground (typ. 0.047 µF C2) sets the integration time constant of the amplified signal to obtain adequate trip delay per KSC4613. A capacitor between pin 6 and pin 7 (~0.047 µF) may also be added when noise is high."       },       {         "number": "7",         "name": "OS",         "type": "output",-        "description": "Level comparator / latch output. Presents the pulse signal after the internal latch circuit; used with an external capacitor (C3, ~0.047 \u00b5F) and drives (through the latch) the SC output that fires the SCR. Latch-on voltage typ. 1.0 V."+        "description": "Level comparator / latch output. Presents the pulse signal after the internal latch circuit; used with an external capacitor (C3, ~0.047 µF) and drives (through the latch) the SC output that fires the SCR. Latch-on voltage typ. 1.0 V."       },       {         "number": "8",         "name": "VCC",         "type": "power_in",-        "description": "Positive supply pin, powered directly from the rectified AC line via series resistor RS and capacitor CS. Operating range 12-20 V (abs. max 20 V, ICC max 8 mA); internal Zener protection and voltage regulator provide the bias voltage. Typical ICC ~400 \u00b5A at VCC=12 V."+        "description": "Positive supply pin, powered directly from the rectified AC line via series resistor RS and capacitor CS. Operating range 12-20 V (abs. max 20 V, ICC max 8 mA); internal Zener protection and voltage regulator provide the bias voltage. Typical ICC ~400 µA at VCC=12 V."       }     ],     "provenance": {@@ -156,5 +156,8 @@     "docs/ht54123arz-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file