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HT4053ARZ

HTCSEMI · Analog Switches, Multiplexers · SOP-16

HT4053ARZ from HTCSEMI, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Y1 bidirectional Analog input/output Y1 of the Y switch, selected when B is high; signal must stay within GND to VCC.
2 Y0 bidirectional Analog input/output Y0 of the Y switch, selected when B is low; signal must stay within GND to VCC.
3 Z1 bidirectional Analog input/output Z1 of the Z switch, selected when C is high; signal must stay within GND to VCC.
4 Z bidirectional Common analog output/input of the Z switch, connected to Z0 or Z1 according to select input C.
5 Z0 bidirectional Analog input/output Z0 of the Z switch, selected when C is low; signal must stay within GND to VCC.
6 ENABLE input Enable input; a logic high turns all channels off, and unused digital pins must be tied to GND or VCC.
7 VEE power_in Negative supply for the analog switches; VCC - VEE up to 13 V can be controlled when VCC - GND = 3 V.
8 GND power_in Ground reference for the digital control inputs.
9 C input Channel-select input C, selects Z0 (low) or Z1 (high) for the Z switch; VIN range is 0 to VCC.
10 B input Channel-select input B, selects Y0 (low) or Y1 (high) for the Y switch; VIN range is 0 to VCC.
11 A input Channel-select input A, selects X0 (low) or X1 (high) for the X switch; VIN range is 0 to VCC.
12 X0 bidirectional Analog input/output X0 of the X switch, selected when A is low; signal must stay within GND to VCC.
13 X1 bidirectional Analog input/output X1 of the X switch, selected when A is high; signal must stay within GND to VCC.
14 X bidirectional Common analog output/input of the X switch, connected to X0 or X1 according to select input A.
15 Y bidirectional Common analog output/input of the Y switch, connected to Y0 or Y1 according to select input B.
16 VCC power_in Positive supply voltage, operating range 3.0 to 18 V referenced to GND, absolute maximum -0.5 to +20 V.

Key specifications

Parameter Value
Manufacturer HTCSEMI
Package SOP-16
Category Interface
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Maximum Power Dissipation per Output Transistor Ptot 100 mW 2
DC Supply Voltage (Referenced to GND) VCC -0.5 20 V 2
DC Input Voltage (Referenced to GND) VIN -0.5 V 2
DC Input Current, per Pin IIN 10 mA 2
Power Dissipation in Still Air PD 500 mW Still air; SO package, -55 to +65 C (footnote *1) 2
Storage Temperature Tstg -65 150 C 2
Lead Temperature TL 260 C 1 mm from case for 10 seconds (plastic DIP or SO package) 2
DC Supply Voltage (Referenced to GND) VCC 3 18 V 2
DC Input Voltage (Referenced to GND) VIN 0 V 2
Operating Temperature, All Package Types TA -55 125 C 2
Minimum High-Level Input Voltage, Channel-Select or Enable Inputs VIH 3.5 V VCC=5 V; VIS=VCC thru 1kΩ; VEE=GND=0; IIS<2μA on all OFF channels; RL=1kΩ to GND; 125 C limit 3
Minimum High-Level Input Voltage, Channel-Select or Enable Inputs VIH 7 V VCC=10 V; VIS=VCC thru 1kΩ; VEE=GND=0; IIS<2μA on all OFF channels; RL=1kΩ to GND; 125 C limit 3
Minimum High-Level Input Voltage, Channel-Select or Enable Inputs VIH 11 V VCC=15 V; VIS=VCC thru 1kΩ; VEE=GND=0; IIS<2μA on all OFF channels; RL=1kΩ to GND; 125 C limit 3
Maximum Low-Level Input Voltage, Channel-Select or Enable Inputs VIL 1.5 V VCC=5 V; VIS=VCC thru 1kΩ; VEE=GND=0; IIS<2μA on all OFF channels; RL=1kΩ to GND; 125 C limit 3
Maximum Low-Level Input Voltage, Channel-Select or Enable Inputs VIL 3 V VCC=10 V; VIS=VCC thru 1kΩ; VEE=GND=0; IIS<2μA on all OFF channels; RL=1kΩ to GND; 125 C limit 3
Maximum Low-Level Input Voltage, Channel-Select or Enable Inputs VIL 4 V VCC=15 V; VIS=VCC thru 1kΩ; VEE=GND=0; IIS<2μA on all OFF channels; RL=1kΩ to GND; 125 C limit 3
Maximum Input Leakage Current, Channel-Select or Enable Inputs IIN 1 μA VCC=18 V; VIN=VCC or GND; VEE=GND=0; 125 C limit 3
Maximum Quiescent Supply Current (per package) ICC 150 μA Channel Select = VCC or GND; VEE=GND=0; VCC=5 V; 125 C limit 3
Maximum Quiescent Supply Current (per package) ICC 300 μA Channel Select = VCC or GND; VEE=GND=0; VCC=10 V; 125 C limit 3
Maximum Quiescent Supply Current (per package) ICC 600 μA Channel Select = VCC or GND; VEE=GND=0; VCC=15 V; 125 C limit 3
Maximum Quiescent Supply Current (per package) ICC 3000 μA Channel Select = VCC or GND; VEE=GND=0; VCC=20 V; 125 C limit 3
Maximum ON Resistance RON 1150 Ω VEE=GND=0; VIS=GND to VCC; VCC=5 V; 125 C limit 3
Maximum ON Resistance RON 550 Ω VEE=GND=0; VIS=GND to VCC; VCC=10 V; 125 C limit 3
Maximum ON Resistance RON 320 Ω VEE=GND=0; VIS=GND to VCC; VCC=15 V; 125 C limit 3
Maximum Off-Channel Leakage Current, Any One Channel IOFF 1000 nA VEE=GND=0; VCC=18 V; 125 C limit 3
Maximum Off-Channel Leakage Current, Common Channel IOFF 1000 nA VEE=GND=0; VCC=18 V; 125 C limit 3
Maximum Input Capacitance, Channel-Select or Enable Inputs CIN 7.5 pF 4
Maximum Propagation Delay, Analog Input to Analog Output (Figure 1) tPHL(tPLH) 70 ns VCC=5 V; RL=200kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Analog Input to Analog Output (Figure 1) tPHL(tPLH) 40 ns VCC=10 V; RL=200kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Analog Input to Analog Output (Figure 1) tPHL(tPLH) 30 ns VCC=15 V; RL=200kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Channel-Select Input to Analog Output (Figure 1) tPHL1(tPLH1) 400 ns VCC=5 V; RL=200 kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Channel-Select Input to Analog Output (Figure 1) tPHL1(tPLH1) 250 ns VCC=10 V; RL=200 kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Channel-Select Input to Analog Output (Figure 1) tPHL1(tPLH1) 200 ns VCC=15 V; RL=200 kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Channel-Select Input to Analog Output (Figure 2) tPZL1(tPZH1) 720 ns VCC=5 V; RL=10 kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Channel-Select Input to Analog Output (Figure 2) tPZL1(tPZH1) 320 ns VCC=10 V; RL=10 kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Channel-Select Input to Analog Output (Figure 2) tPZL1(tPZH1) 240 ns VCC=15 V; RL=10 kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Enable to Analog Output (Figure 2) tPZL2(tPZH2) 720 ns VCC=5 V; RL=10 kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Enable to Analog Output (Figure 2) tPZL2(tPZH2) 320 ns VCC=10 V; RL=10 kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Enable to Analog Output (Figure 2) tPZL2(tPZH2) 240 ns VCC=15 V; RL=10 kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Enable to Analog Output (Figure 2) tPLZ2(tPHZ2) 450 ns VCC=5 V; RL=1,0 kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Enable to Analog Output (Figure 2) tPLZ2(tPHZ2) 210 ns VCC=10 V; RL=1,0 kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4
Maximum Propagation Delay, Enable to Analog Output (Figure 2) tPLZ2(tPHZ2) 160 ns VCC=15 V; RL=1,0 kΩ; VEE=GND=0; CL=50pF; input tr=tf=20.0 ns; 125 C limit 4

CAD (KiCad official)

  • Symbol: HT4053ARZ
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: ht4053arz-etched.step / ht4053arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht4053arz.step / ht4053arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HTCSEMI datasheet (6 pp, sha256 0be9553aa69a58de, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF