component
HT27403ARQZ
Public Made by Adomby adom
HTCSEMI DC-DC Converters, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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HT27403ARQZ
HTCSEMI · DC-DC Converters · QFN-24-EP(4x4)
HT27403ARQZ from HTCSEMI, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SS/TRACK | bidirectional | Soft-start or tracking input: a 3-µA source charges the capacitor to GND until the reference reaches 0.6 V, and the pin can also be driven by an external voltage source for tracking. |
| 2 | RS | input | Negative remote sense input that removes the voltage drop between GND and the local ground at the load, with an RC filter to GND in noisy environments and RS-to-GND connection at the IC if unused; RS pin voltage is limited to -0.1 V to 0.1 V. |
| 3 | FB | input | Voltage-mode error-amplifier inverting input that sets the output voltage, held at 0.6 V ±1% in closed-loop regulation. |
| 4 | COMP | output | Error-amplifier output that is connected to FB through a compensation network to ensure loop stability. |
| 5 | FADJ | input | Frequency adjust input: a resistor between this pin and GND sets the switching frequency, programmable from 200 kHz to 1.2 MHz. |
| 6 | SYNC | input | Synchronization input for PLL locking to an external clock; the frequency defaults to the FADJ setting when no SYNC signal is present, the pin voltage is rated 0 V to 5.5 V, and it should be tied to GND if not used. |
| 7 | UVLO/EN | input | Precision UVLO/enable input with a 1.15 V rising enable threshold, a 0.985 V falling threshold, and a 1.8 µA initial pullup; the pin voltage is rated 0 V to min(VIN, 5.5 V). |
| 8 | OTP | input | Overtemperature protection setpoint pin: a resistor and 0.1-µF capacitor to GND set the OTP threshold, and it should be connected to GND if system-level OTP is not required. |
| 9 | D+ | input | External temperature sense input for a 2N3904-type NPN remote thermal diode (base and collector shorted), used for inductor DCR drift compensation and system thermal shutdown. |
| 10 | D- | input | Return path for the external thermal diode, routed as a differential pair with D+ and connected to GND. |
| 11 | PGOOD | output | Open-drain power-good output that goes low during fault or unregulated conditions and requires an external pullup to VDD or an external rail; it has a 20-µs deglitch filter and must not exceed 5.5 V. |
| 12 | VIN | power_in | Input voltage rail (3.0 V to 20 V recommended) that provides PWM feedforward and the internal bias supply, to be decoupled locally with a 1-µF ceramic capacitor. |
| 13 | GND | power_in | Common ground for power and signal return, including the low-side MOSFET gate return, soft-start capacitor, OTP resistor, and frequency-adjust resistor. |
| 14 | VDD | power_out | Subregulated 4.7 V internal bias rail (recommended 2.6 V to 5.5 V) for gate drive and CBOOT, to be decoupled with a 10-µF ceramic capacitor and not used to drive auxiliary loads. |
| 15 | LG | output | Low-side N-FET gate drive output. |
| 16 | SW | passive | Power-stage switch-node connection that also serves as the high-side gate driver return; recommended SW pin voltage is -0.3 V to 20 V. |
| 17 | HG | output | High-side N-FET gate drive output. |
| 18 | CBOOT | power_out | High-side bootstrap supply for the high-side gate driver, to be connected to SW through a 100-nF ceramic capacitor. |
| 19 | NC | unconnected | No connection; the datasheet specifies to connect this pin directly to GND. |
| 20 | NC | unconnected | No connection; the datasheet specifies to connect this pin directly to GND. |
| 21 | NC | unconnected | No connection; the datasheet specifies to connect this pin directly to GND. |
| 22 | NC | unconnected | No connection; the datasheet specifies to connect this pin directly to GND. |
| 23 | CS+ | input | Noninverting input to the current-sense comparator for DCR-based overcurrent sensing; the CS+ to CS- differential is limited to ±1 V. |
| 24 | CS- | input | Inverting input to the current-sense comparator, providing 9.9 µA of nominal offset current at room temperature to adjust the current-limit setpoint. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HTCSEMI |
| Package | QFN-24-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage VIN, CS+, CS-, SW (absolute maximum) | VIN, CS+, CS-, SW | -0.3 | 22 | V | 4 | ||
| VDD, PGOOD voltage (absolute maximum) | VDD, PGOOD | -0.3 | 6 | V | 4 | ||
| SS/TRACK, SYNC, FADJ, COMP, FB, RS voltage (absolute maximum) | SS/TRACK, SYNC, FADJ, COMP, FB, RS | -0.3 | V | max printed as VVDD + 0.3 V | 4 | ||
| UVLO/EN voltage (absolute maximum) | UVLO/EN | -0.3 | V | max printed as min(VVIN + 0.3, 6) V | 4 | ||
| CBOOT voltage (absolute maximum) | CBOOT | -0.3 | 24 | V | 4 | ||
| CBOOT to SW voltage (absolute maximum) | CBOOT to SW | -0.3 | 6 | V | 4 | ||
| CS+ to CS- voltage (absolute maximum) | CS+ to CS- | -1 | 1 | V | 4 | ||
| OTP, D+, D- voltage (absolute maximum) | OTP, D+, D- | -0.3 | V | max printed as VVDD V | 4 | ||
| Operating junction temperature (absolute maximum) | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature range (handling rating) | Tstg | -65 | 150 | °C | 4 | ||
| ESD human body model (handling rating) | V(ESD) HBM | -2 | 2 | kV | per ANSI/ESDA/JEDEC JS-001, all pins | 4 | |
| ESD charged device model (handling rating) | V(ESD) CDM | -500 | 500 | V | per JEDEC JESD22-C101, all pins | 4 | |
| VIN input voltage with VIN tied to VDD (recommended) | VIN | 3 | 5.5 | V | VIN tied to VDD | 4 | |
| VIN input voltage (recommended) | VIN | 3 | 20 | V | 4 | ||
| SW pin voltage (recommended) | SW | -0.3 | 20 | V | 4 | ||
| VDD pin voltage (recommended) | VDD | 2.6 | 4.7 | 5.5 | V | 4 | |
| PGOOD pin voltage (recommended) | PGOOD | 0 | 5.5 | V | 4 | ||
| UVLO/EN pin voltage (recommended) | UVLO/EN | 0 | V | max printed as min(VVIN, 5.5) V | 4 | ||
| SS/TRACK pin voltage (recommended) | SS/TRACK | 0 | V | max printed as VVDD V | 4 | ||
| SYNC pin voltage (recommended) | SYNC | 0 | 5.5 | V | 4 | ||
| RS pin voltage (recommended) | RS | -0.1 | 0.1 | V | 4 | ||
| Operating junction temperature (recommended) | TJ | -40 | 125 | °C | 4 | ||
| Operating free-air temperature (recommended) | TA | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance | θJA | 32.7 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance | θJCtop | 31.2 | °C/W | 5 | |||
| Junction-to-board thermal resistance | θJB | 11.2 | °C/W | 5 | |||
| Junction-to-top characterization parameter | ψJT | 0.2 | °C/W | 5 | |||
| Junction-to-board characterization parameter | ψJB | 11.2 | °C/W | 5 | |||
| Junction-to-case (bottom) thermal resistance | θJCbot | 1.4 | °C/W | 5 | |||
| Quiescent current (two printed values, column not shown) | IQ | 3.5 | 5 | mA | VFB = 0.6 V (not switching) | 5 | |
| Shutdown quiescent current (two printed values, column not shown) | IQ-SD | 25 | 45 | µA | VUVLO/EN = 0 V | 5 | |
| FB pin voltage accuracy | VFB | 594 | 600 | 606 | mV | 5 | |
| FB pin bias current | IFB | -165 | 0 | 165 | nA | VFB = 0.65 V | 5 |
| Input undervoltage lockout | UVLO | 2.6 | 2.7 | 2.8 | V | VVIN rising, VVDD rising | 5 |
| Switching frequency | FSW | 925 | 1050 | 1150 | kHz | RFADJ = 4.12 kΩ | 5 |
| Switching frequency | FSW | 435 | 500 | 555 | kHz | RFADJ = 20 kΩ | 5 |
| Switching frequency | FSW | 185 | 215 | 250 | kHz | RFADJ = 95.3 kΩ | 5 |
| Maximum duty cycle (two printed values, column not shown) | DMAX | 90 | 93 | % | FSW = 500 kHz | 5 | |
| Minimum off-time | TOFF-MIN | 110 | 150 | 190 | ns | VFB = 0.5 V, FSW = 500 kHz | 5 |
| VDD subregulator output voltage | VDD | 4.2 | 4.7 | 5.3 | V | IVDD = 25 mA | 5 |
| Current limit comparator offset voltage | VCS_OFFSET | -3.5 | 0 | 3.5 | mV | 5 | |
| Current limit offset current | ICS | 9.3 | 9.9 | 10.5 | µA | VCS- = 3 V, ΔVBE = 59.4 mV, TJ = 25°C | 6 |
| Current limit offset current (D+ shorted to D-) | ICS | 3.4 | 5 | 6.6 | µA | VCS- = 3 V, D+ shorted to D- | 6 |
| ICS temperature coefficient | ICS-TC | 160 | 187 | 212 | nA/mV | Referenced to ΔVBE | 6 |
| Soft-start source current | ISS | 1 | 3 | 5 | µA | VSS/TRACK = 0 V | 6 |
| PGOOD low sink current | IPGS | 70 | 100 | µA | VPGOOD = 0.2 V, VFB = 0.75 V | 6 | |
| PGOOD leakage current (two printed values, column not shown) | IPGL | 1 | 10 | µA | VPGOOD = 5 V | 6 | |
| Overvoltage threshold | OVT | 111 | 116.5 | 123 | % | VFB rising, RS tied to GND | 6 |
| Undervoltage threshold | UVT | 86 | 91 | 97 | % | VFB rising, RS tied to GND | 6 |
| UVLO/EN logic low threshold | VUVLO1 | 0.94 | 0.985 | 1.03 | V | VUVLO/EN falling | 6 |
| UVLO/EN logic high threshold | VUVLO2 | 1.11 | 1.15 | 1.18 | V | VUVLO/EN rising | 6 |
| UVLO/EN voltage hysteresis | VUVLO-HYS | 139 | 165 | 190 | mV | VUVLO/EN falling | 6 |
| UVLO/EN pullup current, disabled | IUVLO1 | 0.8 | 1.8 | 2.7 | µA | VUVLO/EN = 0 V | 6 |
| UVLO/EN pullup current, enabled | IUVLO2 | 5.5 | 10.5 | 15.5 | µA | VUVLO/EN = 1.25 V | 6 |
| Remote thermal current | IOTP | 13.5 | 14.6 | 15.5 | µA | ΔVBE = 79.3 mV | 7 |
| IOTP temperature coefficient | IOTP-TC | 158 | 187 | 213 | nA/mV | Referenced to ΔVBE | 7 |
| OTP resistance tolerance, thermal shutdown | ROTP | -5 | 5 | % | ROTP(nom) = 80.7 kΩ, ΔVBE = 79.3 mV, TJ = 125°C | 7 |
CAD (KiCad official)
- Symbol:
HT27403ARQZ - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
ht27403arqz-etched.step/ht27403arqz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ht27403arqz.step/ht27403arqz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HTCSEMI datasheet (50 pp, sha256
c1eb0b3a75c57ec6, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).