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Contents

README

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HT16C21A-28SSOP

Holtek Semicon · LCD Drivers · SSOP-28-150mil

HT16C21A-28SSOP from Holtek Semicon, in a SSOP-28-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive power supply, operating range 2.4V to 5.5V.
2 SDA bidirectional I2C interface serial data input/output.
3 SCL input I2C interface serial clock input.
4 VSS power_in Negative power supply, ground.
5 COM0 output LCD COM output.
6 COM1 output LCD COM output.
7 COM2 output LCD COM output.
8 COM3 output LCD COM output.
9 COM4/SEG0 output LCD COM/SEG multiplexed drive output.
10 COM5/SEG1 output LCD COM/SEG multiplexed drive output.
11 COM6/SEG2 output LCD COM/SEG multiplexed drive output.
12 COM7/SEG3 output LCD COM/SEG multiplexed drive output.
13 SEG4 output LCD SEG output.
14 SEG5 output LCD SEG output.
15 SEG6 output LCD SEG output.
16 SEG7 output LCD SEG output.
17 SEG8 output LCD SEG output.
18 SEG9 output LCD SEG output.
19 SEG10 output LCD SEG output.
20 SEG11 output LCD SEG output.
21 SEG12 output LCD SEG output.
22 SEG13 output LCD SEG output.
23 SEG14 output LCD SEG output.
24 SEG15 output LCD SEG output.
25 SEG16 output LCD SEG output.
26 SEG17 output LCD SEG output.
27 SEG18 output LCD SEG output.
28 SEG19/VLCD bidirectional Shared SEG19 output or VLCD pin (set by the DE bit): as VLCD, an external resistor to VDD sets the bias voltage when internal adjustment is disabled, or it outputs the adjusted voltage for MCU sensing when enabled.

Key specifications

Parameter Value
Manufacturer Holtek Semicon
Package SSOP-28-150mil
Category LED Drivers
Pins 28

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating voltage VDD 2.4 5.5 V 7
Operating current (display on, 1/3 bias, 80Hz) IDD 18 36 μA 3V 无负载,VLCD=VDD,1/3 bias,fLCD=80Hz,LCD显示开启,内部系统振荡器开启,DA0~DA3=0000 7
Operating current (display on, 1/3 bias, 80Hz) IDD 25 50 μA 5V 7
Operating current (display off) IDD1 2 5 μA 3V 无负载,VLCD=VDD,1/3 bias,fLCD=80Hz,LCD显示关闭,内部系统振荡器开启,DA0~DA3=0000 7
Operating current (display off) IDD1 4 10 μA 5V 7
Standby current ISTB 1 μA 3V 无负载,VLCD=VDD,LCD显示关闭,内部系统振荡器关闭 7
Standby current ISTB 2 μA 5V 7
Low-level input voltage VIL 0 V SDA,SCL 7
Input leakage current IIL -1 1 μA VIN=VSS 或 VDD 8
Low-level output current (SDA) IOL 3 mA 3V, VOL=0.4V, SDA pin 8
Low-level output current (SDA) IOL 6 mA 5V 8
LCD COM sink current IOL1 250 400 μA 3V, VLCD=3V, VOL=0.3V 8
LCD COM sink current IOL1 500 800 μA 5V, VLCD=5V, VOL=0.5V 8
LCD COM source current IOH1 -140 -230 μA 3V, VLCD=3V, VOH=2.7V 8
LCD COM source current IOH1 -300 -500 μA 5V, VLCD=5V, VOH=4.5V 8
LCD SEG sink current IOL2 250 400 μA 3V, VLCD=3V, VOL=0.3V 8
LCD SEG sink current IOL2 500 800 μA 5V, VLCD=5V, VOL=0.5V 8
LCD SEG source current IOH2 -140 -230 μA 3V, VLCD=3V, VOH=2.7V 8
LCD SEG source current IOH2 -300 -500 μA 5V, VLCD=5V, VOH=4.5V 8
LCD frame frequency fLCD1 72 80 88 Hz 4V, 1/4 duty, Ta=25°C 8
LCD frame frequency (160Hz setting) fLCD2 144 160 176 Hz 4V, 1/4 duty, Ta=25°C 8
LCD frame frequency fLCD3 52 80 124 Hz 4V, 1/4 duty, Ta=-40°C~85°C 8
LCD frame frequency (160Hz setting) fLCD4 104 160 248 Hz 4V, 1/4 duty, Ta=-40°C~85°C 8
Power-on reset voltage VPOR 100 mV 8
Power-on reset VDD rise rate RRVDD 0.05 V/ms 8
Minimum time VDD held at VPOR tPOR 10 ms 8
SCL clock frequency fSCL 100 kHz VDD=2.4V~5.5V 8
SCL clock frequency fSCL 400 kHz VDD=3.0V~5.5V 8
Bus free time tBUF 4.7 μs VDD=2.4V~5.5V; 在此期间总线必须保持空闲直到新的传输开始 8
Bus free time tBUF 1.3 μs VDD=3.0V~5.5V; 在此期间总线必须保持空闲直到新的传输开始 8
START hold time tHD:STA 4 μs VDD=2.4V~5.5V; 此周期后,产生第一个时钟脉冲 8
START hold time tHD:STA 0.6 μs VDD=3.0V~5.5V; 此周期后,产生第一个时钟脉冲 8
SCL low time tLOW 4.7 μs VDD=2.4V~5.5V 8
SCL low time tLOW 1.3 μs VDD=3.0V~5.5V 8
SCL high time tHIGH 4 μs VDD=2.4V~5.5V 8
SCL high time tHIGH 0.6 μs VDD=3.0V~5.5V 8
START setup time tSU:STA 4.7 μs VDD=2.4V~5.5V; 仅与重复发送的 START 信号有关 8
START setup time tSU:STA 0.6 μs VDD=3.0V~5.5V; 仅与重复发送的 START 信号有关 8
Data hold time tHD:DAT 0 ns VDD=2.4V~5.5V 8
Data setup time tSU:DAT 250 ns VDD=2.4V~5.5V 8
Data setup time tSU:DAT 100 ns VDD=3.0V~5.5V 8
SDA and SCL rise time tR 1 μs VDD=2.4V~5.5V; 注:周期性采样测试,非100%测试 8
SDA and SCL rise time tR 0.3 μs VDD=3.0V~5.5V; 注:周期性采样测试,非100%测试 8
SDA and SCL fall time tF 0.3 μs VDD=2.4V~5.5V; 注:周期性采样测试,非100%测试 8
STOP setup time tSU:STO 4 μs VDD=2.4V~5.5V 8
STOP setup time tSU:STO 0.6 μs VDD=3.0V~5.5V 8
Valid clock output time tAA 3.5 μs VDD=2.4V~5.5V 8
Valid clock output time tAA 0.9 μs VDD=3.0V~5.5V 8
Input filter time constant (SDA and SCL pins, noise suppression time) tSP 100 ns VDD=2.4V~5.5V; 注:周期性采样测试,非100%测试 9
Input filter time constant (SDA and SCL pins, noise suppression time) tSP 50 ns VDD=3.0V~5.5V; 注:周期性采样测试,非100%测试 9
Storage temperature -60 150 °C 7
Operating temperature -40 85 °C 7

CAD (KiCad official)

  • Symbol: HT16C21A-28SSOP
  • Footprint: Package_SO:SSOP-28_5.3x10.2mm_P0.65mm
  • 3D model: SSOP-28-150mil (KiCad packages3D, STEP)
  • 3D model files: ht16c21a-28ssop-etched.step / ht16c21a-28ssop-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht16c21a-28ssop.step / ht16c21a-28ssop.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Holtek Semicon datasheet (35 pp, sha256 9e2057530a66f187, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF