HT1413ARZ

{
  "slug": "ht1413arz",
  "version": "0.1.0",
  "type": "component",
  "description": "HTCSEMI Darlington Transistor Arrays, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "transistors-thyristors",
    "ht1413arz",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
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    "README.md",
    "ht1413arz.kicad_sym",
    "ht1413arz.kicad_mod",
    "ht1413arz.glb",
    "ht1413arz.step",
    "ht1413arz.lbr",
    "docs/hero.png",
    "docs/ht1413arz-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ht1413arz-hero.glb",
    "ht1413arz-hero.overlay.json",
    "ht1413arz-etched.glb"
  ],
  "component": {
    "mpn": "HT1413ARZ",
    "manufacturer": "HTCSEMI",
    "package": "SOP-16",
    "pin_count": 16,
    "category": "Transistors/Thyristors",
    "subcategory": "Darlington Transistor Arrays",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590454792355930112",
    "parts": {
      "symbol": "ht1413arz.kicad_sym",
      "footprint": "ht1413arz.kicad_mod",
      "model_3d": "ht1413arz-hero.glb",
      "model_3d_plain": "ht1413arz-etched.glb",
      "model_3d_step": "ht1413arz-etched.step",
      "model_3d_step_plain": "ht1413arz.step",
      "lbr": "ht1413arz.lbr"
    },
    "distributor_links": {
      "lcsc": "C5241921"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T09:25:59Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "error"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "I1",
        "type": "input",
        "description": "Input of Darlington driver 1 with 2.7 k series input resistor, suited to 5.0 V TTL/CMOS logic; maximum input voltage 30 V."
      },
      {
        "number": "2",
        "name": "I2",
        "type": "input",
        "description": "Input of Darlington driver 2 with 2.7 k series input resistor, suited to 5.0 V TTL/CMOS logic; maximum input voltage 30 V."
      },
      {
        "number": "3",
        "name": "I3",
        "type": "input",
        "description": "Input of Darlington driver 3 with 2.7 k series input resistor, suited to 5.0 V TTL/CMOS logic; maximum input voltage 30 V."
      },
      {
        "number": "4",
        "name": "I4",
        "type": "input",
        "description": "Input of Darlington driver 4 with 2.7 k series input resistor, suited to 5.0 V TTL/CMOS logic; maximum input voltage 30 V."
      },
      {
        "number": "5",
        "name": "I5",
        "type": "input",
        "description": "Input of Darlington driver 5 with 2.7 k series input resistor, suited to 5.0 V TTL/CMOS logic; maximum input voltage 30 V."
      },
      {
        "number": "6",
        "name": "I6",
        "type": "input",
        "description": "Input of Darlington driver 6 with 2.7 k series input resistor, suited to 5.0 V TTL/CMOS logic; maximum input voltage 30 V."
      },
      {
        "number": "7",
        "name": "I7",
        "type": "input",
        "description": "Input of Darlington driver 7 with 2.7 k series input resistor, suited to 5.0 V TTL/CMOS logic; maximum input voltage 30 V."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground (emitter common) of the transistor array."
      },
      {
        "number": "9",
        "name": "COM",
        "type": "passive",
        "description": "Common connection of the internal clamp (suppression) diodes, tied to the supply of the inductive load; diode forward current rated 350 mA."
      },
      {
        "number": "10",
        "name": "O7",
        "type": "output",
        "description": "Open-collector Darlington output 7; maximum output voltage 50 V and continuous collector current 500 mA."
      },
      {
        "number": "11",
        "name": "O6",
        "type": "output",
        "description": "Open-collector Darlington output 6; maximum output voltage 50 V and continuous collector current 500 mA."
      },
      {
        "number": "12",
        "name": "O5",
        "type": "output",
        "description": "Open-collector Darlington output 5; maximum output voltage 50 V and continuous collector current 500 mA."
      },
      {
        "number": "13",
        "name": "O4",
        "type": "output",
        "description": "Open-collector Darlington output 4; maximum output voltage 50 V and continuous collector current 500 mA."
      },
      {
        "number": "14",
        "name": "O3",
        "type": "output",
        "description": "Open-collector Darlington output 3; maximum output voltage 50 V and continuous collector current 500 mA."
      },
      {
        "number": "15",
        "name": "O2",
        "type": "output",
        "description": "Open-collector Darlington output 2; maximum output voltage 50 V and continuous collector current 500 mA."
      },
      {
        "number": "16",
        "name": "O1",
        "type": "output",
        "description": "Open-collector Darlington output 1; maximum output voltage 50 V and continuous collector current 500 mA."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text+vision",
        "consensus_model": "claude-opus-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin names (I1-I7, O1-O7, COM, GND) are not printed in the datasheet. They were inferred from the Fig; The datasheet's package drawings are for PDIP-16 and SOIC-16 and carry no SOP16 R-suffix outline. Th",
          "vision extraction: provenance cannot be text-verified; needs consensus"
        ],
        "pages_sent": 6,
        "cost_usd": 0.2204,
        "at": "2026-10-19T09:25:42"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590454792355930112",
        "pages": 6,
        "sha256": "f054e09776cea4ae",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ht1413arz-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
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        "extents_mm": [
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        "zmin_mm": -0.0,
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        "sha256": "b760eff052fa72a5e2070f209943a1666d1658657736ccac6a1bf59ab1a56b8e",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}