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HSN75176ADR
Public Made by Adomby adom
HXY MOSFET RS-485 / RS-422 ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHSN75176ADR
HXY MOSFET · RS-485 / RS-422 ICs · SOP-8
HSN75176ADR from HXY MOSFET, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R | output | Receiver data output; the datasheet's pin table gives it as a digital output carrying the receiver result. |
| 2 | RE | input | Active-LOW receiver enable input, so driving it low enables the receiver output. |
| 3 | DE | input | Active-HIGH driver enable input; the driver outputs are high impedance when it is low. |
| 4 | D | input | Driver data input that sets the differential bus output when the driver is enabled. |
| 5 | GND | power_in | Reference potential; the local device ground for the transceiver. |
| 6 | A | bidirectional | Bus input/output acting as driver output or receiver input, complementary to pin B. |
| 7 | B | bidirectional | Bus input/output acting as driver output or receiver input, complementary to pin A. |
| 8 | VCC | power_in | Supply pin; the datasheet specifies a 4.75 V to 5.25 V supply (5 V nominal). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HXY MOSFET |
| Package | SOP-8 |
| Category | Interface |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 7 | V | 3 | |||
| Voltage range at any bus terminal | -10 | 15 | V | 3 | |||
| Enable input voltage | VI | 5.5 | V | 3 | |||
| Operating virtual junction temperature | TJ | 150 | °C | 3 | |||
| Lead temperature | 260 | °C | 1,6 mm (1/16 inch) from case for 10 seconds | 3 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| Package thermal impedance | θJA | 85 | °C/W | 3 | |||
| Supply voltage | VCC | 4.75 | 5 | 5.25 | V | 3 | |
| Voltage at any bus terminal (separately or common mode) | VI or VIC | -7 | 12 | V | separately or common mode | 3 | |
| High-level input voltage | VIH | 2 | V | D, DE, and RE | 3 | ||
| Low-level input voltage | VIL | 0.8 | V | D, DE, and RE | 3 | ||
| Differential input voltage | VID | -12 | 12 | V | 3 | ||
| High-level output current, driver | IOH | -60 | mA | Driver | 3 | ||
| High-level output current, receiver | IOH | -400 | µA | Receiver | 3 | ||
| Low-level output current, driver | IOL | 60 | mA | Driver | 3 | ||
| Low-level output current, receiver | IOL | 8 | mA | Receiver | 3 | ||
| Operating free-air temperature | TA | 0 | 70 | °C | 3 | ||
| Input clamp voltage (driver) | VIK | -1.5 | V | II = -18 mA | 4 | ||
| Change in magnitude of differential output voltage | ∆/VOD/ | -0.2 | 0.2 | V | RL = 54 Ω or 100 Ω | 4 | |
| Common-mode output voltage | VOC | -1 | 3 | V | RL = 54 Ω or 100 Ω | 4 | |
| Change in magnitude of common-mode output voltage | ∆/VOC/ | -0.2 | 0.2 | V | RL = 54 Ω or 100 Ω | 4 | |
| Output current, output disabled | IO | 1 | mA | Output disabled; VO = 12 V | 4 | ||
| Output current, output disabled | IO | -0.8 | mA | Output disabled; VO = -7 V | 4 | ||
| High-level input current (driver) | IIH | 20 | µA | VI = 2.4 V | 4 | ||
| Low-level input current (driver) | IIL | -400 | µA | VI = 0.4 V | 4 | ||
| Supply current (total package), outputs enabled | ICC | 42 | 70 | mA | No load; outputs enabled | 4 | |
| Supply current (total package), outputs disabled | ICC | 26 | 35 | mA | No load; outputs disabled | 4 | |
| Propagation/differential-output delay time | td(OD) | 15 | 22 | ns | RL = 54 Ω | 4 | |
| Differential-output transition time | tt(OD) | 20 | 30 | ns | RL = 54 Ω | 4 | |
| Output enable time to high level | tPZH | 85 | 120 | ns | VCC = 5 V, RL = 110 Ω, TA = 25°C | 4 | |
| Output enable time to low level | tPZL | 40 | 60 | ns | VCC = 5 V, RL = 110 Ω, TA = 25°C | 4 | |
| Output disable time from high level | tPHZ | 150 | 250 | ns | VCC = 5 V, RL = 110 Ω, TA = 25°C | 4 | |
| Output disable time from low level | tPLZ | 20 | 30 | ns | VCC = 5 V, RL = 110 Ω, TA = 25°C | 4 | |
| Positive-going input threshold voltage | VIT+ | 0.2 | V | VO = 2.7 V, IO = -0.4 mA | 5 | ||
| Negative-going input threshold voltage | VIT- | -0.2 | V | VO = 0.5 V, IO = 8 mA | 5 | ||
| Input hysteresis voltage (VIT+, VIT-) | Vhys | 50 | mV | 5 | |||
| Enable input clamp voltage | VIK | -1.5 | V | II = -18 mA | 5 | ||
| High-level output voltage | VOH | 2.7 | V | VID = 200 mV, IOH = -400 µA | 5 | ||
| Low-level output voltage | VOL | 0.45 | V | VID = -200 mV, IOL = 8 mA | 5 | ||
| High-impedance-state output current | IOZ | -20 | 20 | µA | VO = 0.4 V to 2.4 V | 5 | |
| Line input current | II | 1 | mA | Other input = 0 V; VI = 12 V | 5 | ||
| Line input current | II | -0.8 | mA | VI = -7 V | 5 | ||
| High-level enable input current | IIH | 20 | µA | VIH = 2.7 V | 5 | ||
| Low-level enable input current | IIL | -100 | µA | VIL = 0.4 V | 5 | ||
| Input resistance | ri | 12 | kΩ | 5 | |||
| Supply current (total package), outputs enabled | ICC | 42 | 55 | mA | No load; outputs enabled | 5 | |
| Supply current (total package), outputs disabled | ICC | 26 | 35 | mA | No load; outputs disabled | 5 | |
| Propagation delay time, low- to high-level output | tPLH | 21 | 35 | ns | VCC = 5 V, CL = 15 pF, TA = 25°C | 5 | |
| Propagation delay time, high- to low-level output | tPHL | 23 | 35 | ns | VCC = 5 V, CL = 15 pF, TA = 25°C | 5 | |
| Output enable time to high level (receiver) | tPZH | 10 | 20 | ns | VCC = 5 V, CL = 15 pF, TA = 25°C | 5 | |
| Output enable time to low level (receiver) | tPZL | 12 | 20 | ns | VCC = 5 V, CL = 15 pF, TA = 25°C | 5 |
CAD (KiCad official)
- Symbol:
HSN75176ADR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
hsn75176adr-etched.step/hsn75176adr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hsn75176adr.step/hsn75176adr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HXY MOSFET datasheet (12 pp, sha256
98f4df922cba7c80, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).