component
HSM4115
Public Made by Adomby adom
HUASHUO MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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HSM4115
HUASHUO · MOSFETs · SOP-8
HSM4115 from HUASHUO, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET; the pin 1 end of the package, with pins 1-3 shorted together as source. |
| 2 | S | passive | Source of the P-channel MOSFET, tied with pins 1 and 3 externally. |
| 3 | S | passive | Source of the P-channel MOSFET, tied with pins 1 and 2 externally. |
| 4 | G | input | Gate of the P-channel MOSFET; gate-source voltage rated ±20 V, threshold -1.0 V min to -2.5 V max at ID=-250uA. |
| 5 | D | passive | Drain of the P-channel MOSFET (VDS -40 V, ID -8.7 A), tied with pins 6-8. |
| 6 | D | passive | Drain of the P-channel MOSFET (VDS -40 V, ID -8.7 A), tied with pins 5, 7 and 8. |
| 7 | D | passive | Drain of the P-channel MOSFET (VDS -40 V, ID -8.7 A), tied with pins 5, 6 and 8. |
| 8 | D | passive | Drain of the P-channel MOSFET (VDS -40 V, ID -8.7 A), tied with pins 5-7. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HUASHUO |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -40 | V | VGS=0V, ID=-250uA | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 13 | mΩ | VGS=-10V, ID=-8A | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 20 | mΩ | VGS=-4.5V, ID=-6A | 2 | ||
| Gate Threshold Voltage | VGS(th) | -1 | -1.6 | -2.5 | V | VGS=VDS, ID=-250uA | 2 |
| Drain-Source Leakage Current | IDSS | 1 | uA | VDS=-32V, VGS=0V, TJ=25℃ | 2 | ||
| Drain-Source Leakage Current | IDSS | 5 | uA | VDS=-32V, VGS=0V, TJ=55℃ | 2 | ||
| Gate-Source Leakage Current | IGSS | -100 | 100 | nA | VGS=±20V, VDS=0V | 2 | |
| Continuous Source Current | IS | -8.7 | A | VG=VD=0V, Force Current | 2 | ||
| Pulsed Source Current | ISM | -18 | A | 2 | |||
| Diode Forward Voltage | VSD | -1 | V | VGS=0V, IS=-1A, TJ=25℃ | 2 | ||
| Drain-Source Voltage | VDS | -40 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | -8.7 | A | VGS @ -10V, TA=25℃ | 1 | ||
| Continuous Drain Current | ID | -7 | A | VGS @ -10V, TA=70℃ | 1 | ||
| Pulsed Drain Current | IDM | -18 | A | 1 | |||
| Single Pulse Avalanche Energy | EAS | 146 | mJ | Single pulse | 1 | ||
| Avalanche Current | IAS | -54 | A | 1 | |||
| Total Power Dissipation | PD | 1.5 | W | TA=25℃ | 1 | ||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | ℃ | 1 | ||
| Thermal Resistance Junction-Ambient | RθJA | 85 | ℃/W | Surface mounted on 1 inch² FR-4 board, 2OZ copper (note 1) | 1 | ||
| Thermal Resistance Junction-Case | RθJC | 24 | ℃/W | Note 1 | 1 |
CAD (KiCad official)
- Symbol:
HSM4115 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
hsm4115-etched.step/hsm4115-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hsm4115.step/hsm4115.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HUASHUO datasheet (6 pp, sha256
ac82d6a8f33b73fb, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HSM4115
**HUASHUO** · MOSFETs · SOP-8
HSM4115 from HUASHUO, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET; the pin 1 end of the package, with pins 1-3 shorted together as source. |
| 2 | S | passive | Source of the P-channel MOSFET, tied with pins 1 and 3 externally. |
| 3 | S | passive | Source of the P-channel MOSFET, tied with pins 1 and 2 externally. |
| 4 | G | input | Gate of the P-channel MOSFET; gate-source voltage rated ±20 V, threshold -1.0 V min to -2.5 V max at ID=-250uA. |
| 5 | D | passive | Drain of the P-channel MOSFET (VDS -40 V, ID -8.7 A), tied with pins 6-8. |
| 6 | D | passive | Drain of the P-channel MOSFET (VDS -40 V, ID -8.7 A), tied with pins 5, 7 and 8. |
| 7 | D | passive | Drain of the P-channel MOSFET (VDS -40 V, ID -8.7 A), tied with pins 5, 6 and 8. |
| 8 | D | passive | Drain of the P-channel MOSFET (VDS -40 V, ID -8.7 A), tied with pins 5-7. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HUASHUO |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -40 | | | V | VGS=0V, ID=-250uA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | | 13 | mΩ | VGS=-10V, ID=-8A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | | 20 | mΩ | VGS=-4.5V, ID=-6A | 2 |
| Gate Threshold Voltage | VGS(th) | -1 | -1.6 | -2.5 | V | VGS=VDS, ID=-250uA | 2 |
| Drain-Source Leakage Current | IDSS | | | 1 | uA | VDS=-32V, VGS=0V, TJ=25℃ | 2 |
| Drain-Source Leakage Current | IDSS | | | 5 | uA | VDS=-32V, VGS=0V, TJ=55℃ | 2 |
| Gate-Source Leakage Current | IGSS | -100 | | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Continuous Source Current | IS | | | -8.7 | A | VG=VD=0V, Force Current | 2 |
| Pulsed Source Current | ISM | | | -18 | A | | 2 |
| Diode Forward Voltage | VSD | | | -1 | V | VGS=0V, IS=-1A, TJ=25℃ | 2 |
| Drain-Source Voltage | VDS | | | -40 | V | | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Continuous Drain Current | ID | | | -8.7 | A | VGS @ -10V, TA=25℃ | 1 |
| Continuous Drain Current | ID | | | -7 | A | VGS @ -10V, TA=70℃ | 1 |
| Pulsed Drain Current | IDM | | | -18 | A | | 1 |
| Single Pulse Avalanche Energy | EAS | | | 146 | mJ | Single pulse | 1 |
| Avalanche Current | IAS | | | -54 | A | | 1 |
| Total Power Dissipation | PD | | | 1.5 | W | TA=25℃ | 1 |
| Storage Temperature Range | TSTG | -55 | | 150 | ℃ | | 1 |
| Operating Junction Temperature Range | TJ | -55 | | 150 | ℃ | | 1 |
| Thermal Resistance Junction-Ambient | RθJA | | | 85 | ℃/W | Surface mounted on 1 inch² FR-4 board, 2OZ copper (note 1) | 1 |
| Thermal Resistance Junction-Case | RθJC | | | 24 | ℃/W | Note 1 | 1 |
## CAD (KiCad official)
- Symbol: `HSM4115`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `hsm4115-etched.step` / `hsm4115-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hsm4115.step` / `hsm4115.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HUASHUO datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757799807186276352) (6 pp, sha256 `ac82d6a8f33b73fb`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/hsm4115-datasheet.pdf)