component
HR1001AGS-Z
Public Made by Adomby adom
Monolithic Power Systems AC-DC Controllers And Regulators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "hr1001ags-z",
"version": "0.1.0",
"type": "component",
"description": "Monolithic Power Systems AC-DC Controllers And Regulators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management (pmic)",
"hr1001ags-z",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
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"README.md",
"hr1001ags-z.kicad_sym",
"hr1001ags-z.kicad_mod",
"hr1001ags-z.glb",
"hr1001ags-z.step",
"hr1001ags-z.lbr",
"docs/hero.png",
"docs/hr1001ags-z-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"hr1001ags-z-hero.glb",
"hr1001ags-z-hero.overlay.json",
"hr1001ags-z-etched.glb"
],
"component": {
"mpn": "HR1001AGS-Z",
"manufacturer": "Monolithic Power Systems",
"package": "SOIC-16",
"pin_count": 16,
"category": "Power Management (PMIC)",
"subcategory": "AC-DC Controllers And Regulators",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603149463741612032",
"parts": {
"symbol": "hr1001ags-z.kicad_sym",
"footprint": "hr1001ags-z.kicad_mod",
"model_3d": "hr1001ags-z-hero.glb",
"model_3d_plain": "hr1001ags-z-etched.glb",
"model_3d_step": "hr1001ags-z-etched.step",
"model_3d_step_plain": "hr1001ags-z.step",
"lbr": "hr1001ags-z.lbr"
},
"distributor_links": {
"lcsc": "C17184605",
"digikey": "1589-1513-2-ND",
"mouser": "946-HR1001AGS-Z"
},
"distributor_check": {
"checked_at": "2026-10-21T00:35:42Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "1589-1513-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "946-HR1001AGS-Z",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "SS",
"type": "passive",
"description": "Soft-start pin: an external capacitor to GND and a resistor to FSET set the maximum oscillator frequency and the start-up frequency-shift time constant, and an internal switch discharges the capacitor when the chip turns off."
},
{
"number": "2",
"name": "TIMER",
"type": "passive",
"description": "Capacitor and resistor from TIMER to GND set the over-current fault duration and restart delay; the IC stops switching above 3.5V on TIMER and re-enters soft start below 0.28V."
},
{
"number": "3",
"name": "CT",
"type": "passive",
"description": "Timing capacitor node charged and discharged by an internal current source programmed by the FSET network, which sets the converter switching frequency."
},
{
"number": "4",
"name": "FSET",
"type": "passive",
"description": "Provides a precise 2V reference; a resistor to GND sets the minimum oscillator frequency, the optocoupler phototransistor connects here to close the feedback loop, and the resistor value sets the maximum operating frequency."
},
{
"number": "5",
"name": "BURST",
"type": "input",
"description": "Burst-mode threshold compared to an internal 1.23V reference: the IC idles when BURST is below it and resumes switching above 1.26V (30mV hysteresis), and BURST must connect to FSET if burst mode is not used."
},
{
"number": "6",
"name": "CS",
"type": "input",
"description": "Half-bridge current sense input for a sense resistor or capacitive divider, with over-current regulation at 0.78V, over-current protection when VCS exceeds 1.5V, and capacitive mode protection; connect to GND if unused."
},
{
"number": "7",
"name": "BO",
"type": "input",
"description": "Input voltage sense and brown-in/out protection: the gate driver is enabled when BO is above 2.3V and the IC is disabled when BO is below 1.81V."
},
{
"number": "8",
"name": "LATCH",
"type": "input",
"description": "Latch-off input: when LATCH exceeds 1.85V the IC shuts down and drops to near pre-startup bias current, and LATCH resets only when VCC discharges below its UVLO threshold; connect to GND if unused."
},
{
"number": "9",
"name": "HBVS",
"type": "input",
"description": "Half-bridge dv/dt sense input, connected to SW through a high-voltage capacitor, whose dv/dt current adaptively sets the dead time between the high-side and low-side gates."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Ground: current return for the low-side gate driver and the IC bias, with signal and pulsed-current returns routed separately."
},
{
"number": "11",
"name": "LG",
"type": "output",
"description": "Low-side gate driver output capable of 0.8A peak source/sink current to drive the lower MOSFET, pulled to GND during UVLO."
},
{
"number": "12",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage for the IC bias and low-side gate driver, specified at 13V to 15.5V in recommended operating conditions, with a small bypass capacitor (e.g., 0.1µF) recommended."
},
{
"number": "13",
"name": "NC",
"type": "unconnected",
"description": "High-voltage spacer with no internal connection, included to isolate the high-voltage pin and ease PCB creepage-distance compliance."
},
{
"number": "14",
"name": "SW",
"type": "passive",
"description": "High-side switch source and current return for the high-side gate drive, requiring careful layout to avoid large spikes below ground."
},
{
"number": "15",
"name": "HG",
"type": "output",
"description": "High-side floating gate driver output capable of 0.8A peak source/sink current to drive the upper MOSFET, with an internal resistor to SW keeping it from floating during UVLO."
},
{
"number": "16",
"name": "BST",
"type": "power_in",
"description": "Bias for the floating high-side gate driver supply; a bootstrap capacitor connects between BST and SW and is charged by an internal bootstrap diode driven in phase with the low-side gate drive."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The TOP VIEW package drawing (page 3) did not come through as text, so pin numbers were taken from t; Ordering info lists only HR1001AGS in SOIC-16; the -Z suffix denotes tape and reel of the same packa"
],
"pages_sent": 9,
"cost_usd": 0.0482,
"at": "2026-10-21T00:33:22"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603149463741612032",
"pages": 25,
"sha256": "d257aff97a168e85",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"footprint": "viewers/footprint.html"
},
"models_3d": [
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"file": "hr1001ags-z.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
9.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
"checked": "2026-10-21",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "hr1001ags-z-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
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"footprint_binding": "identity",
"sha256": "3b75a6e4f86d36665a7adf626f94a20e5d454f49644bd3053cd1e844b4c1772a",
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]
}
}