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HR1001AGS-Z

Public Made by Adom

by adom

Monolithic Power Systems AC-DC Controllers And Regulators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HR1001AGS-Z

Monolithic Power Systems · AC-DC Controllers And Regulators · SOIC-16

HR1001AGS-Z from Monolithic Power Systems, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SS passive Soft-start pin: an external capacitor to GND and a resistor to FSET set the maximum oscillator frequency and the start-up frequency-shift time constant, and an internal switch discharges the capacitor when the chip turns off.
2 TIMER passive Capacitor and resistor from TIMER to GND set the over-current fault duration and restart delay; the IC stops switching above 3.5V on TIMER and re-enters soft start below 0.28V.
3 CT passive Timing capacitor node charged and discharged by an internal current source programmed by the FSET network, which sets the converter switching frequency.
4 FSET passive Provides a precise 2V reference; a resistor to GND sets the minimum oscillator frequency, the optocoupler phototransistor connects here to close the feedback loop, and the resistor value sets the maximum operating frequency.
5 BURST input Burst-mode threshold compared to an internal 1.23V reference: the IC idles when BURST is below it and resumes switching above 1.26V (30mV hysteresis), and BURST must connect to FSET if burst mode is not used.
6 CS input Half-bridge current sense input for a sense resistor or capacitive divider, with over-current regulation at 0.78V, over-current protection when VCS exceeds 1.5V, and capacitive mode protection; connect to GND if unused.
7 BO input Input voltage sense and brown-in/out protection: the gate driver is enabled when BO is above 2.3V and the IC is disabled when BO is below 1.81V.
8 LATCH input Latch-off input: when LATCH exceeds 1.85V the IC shuts down and drops to near pre-startup bias current, and LATCH resets only when VCC discharges below its UVLO threshold; connect to GND if unused.
9 HBVS input Half-bridge dv/dt sense input, connected to SW through a high-voltage capacitor, whose dv/dt current adaptively sets the dead time between the high-side and low-side gates.
10 GND power_in Ground: current return for the low-side gate driver and the IC bias, with signal and pulsed-current returns routed separately.
11 LG output Low-side gate driver output capable of 0.8A peak source/sink current to drive the lower MOSFET, pulled to GND during UVLO.
12 VCC power_in Supply voltage for the IC bias and low-side gate driver, specified at 13V to 15.5V in recommended operating conditions, with a small bypass capacitor (e.g., 0.1µF) recommended.
13 NC unconnected High-voltage spacer with no internal connection, included to isolate the high-voltage pin and ease PCB creepage-distance compliance.
14 SW passive High-side switch source and current return for the high-side gate drive, requiring careful layout to avoid large spikes below ground.
15 HG output High-side floating gate driver output capable of 0.8A peak source/sink current to drive the upper MOSFET, with an internal resistor to SW keeping it from floating during UVLO.
16 BST power_in Bias for the floating high-side gate driver supply; a bootstrap capacitor connects between BST and SW and is charged by an internal bootstrap diode driven in phase with the low-side gate drive.

Key specifications

Parameter Value
Manufacturer Monolithic Power Systems
Package SOIC-16
Category Power Management (PMIC)
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
BST voltage -0.3 618 V 4
SW voltage -3 600 V 4
Max voltage slew rate of SW 50 V/ns 4
Sink current of HBVS -65 65 mA 4
Voltage on HBVS -0.3 V 4
Source current of FSET 2 mA 4
Voltage rating of LG -0.3 V 4
Voltage on CS -3 6 V 4
Other analog inputs and outputs -0.3 6 V 4
Continuous power dissipation PIC 1.56 W TA = +25°C 4
Junction temperature 150 °C 4
Storage temperature -65 150 °C 4
ESD immunity HBM, BST, HG, SW pins 2.5 kV HBM 4
ESD immunity HBM, other pins 4 kV HBM 4
Supply voltage VCC VCC 13 15.5 V 4
Analog inputs and outputs -0.3 6 V 4
Operating junction temperature TJ -40 125 °C 4
VCC operating range VCC 8.9 15.5 V 5
VCC high threshold, IC switch on VCCH 10.3 11 11.7 V 5
VCC low threshold, IC switch off VCCL 7.5 8.2 8.9 V 5
Residual consumption IFault 240 350 420 µA VCC<8.2V or VLATCH>1.85V or VCS>1.5V or VTIMER>3.5V or VBO<1.81V or VBO>5.5V or OTP 5
Frequency shift threshold VCS-OCR 0.71 0.78 0.85 V 5
OCP threshold VCS-OCP 1.41 1.5 1.59 V 5
Current polarity comparator ref. when HG turns off VCSPR 50 85 131 mV 5
Current polarity comparator ref. when LG turns off VCSNR -131 -85 -50 mV 5
VBO clamp level VBO-Clamp 5.1 5.5 5.9 V 5
Latch threshold VLATCH 1.72 1.85 1.95 V 6
Output duty cycle D 48 50 52 % TJ=25°C 6
Output duty cycle D 47 50 53 % TJ=-40 ~ 125°C 6
Voltage reference at FSET VREF 1.87 2 2.05 V 6
Dead-time tDMIN tDMIN 180 235 290 ns CHBVS=5pF 6
Dead-time tD-float tD-float 250 350 450 ns HBVS floating 6
Standby disable threshold VBurst 1.17 1.23 1.28 V 6
Charge current ITIMER 80 130 180 µA VTIMER=1V, VCS=0.85V, TJ=25°C 6
Threshold for forced operation at maximum frequency VTIMER-fmax 1.8 2 2.1 V 6
Shutdown threshold VTIMER-SD 3.2 3.5 3.7 V 6
Restart threshold VTIMER-R 0.21 0.28 0.35 V 6
Junction-to-ambient thermal resistance, SOIC-16 θJA 80 °C/W Measured on JESD51-7, 4-layer PCB 4

CAD (KiCad official)

  • Symbol: HR1001AGS-Z
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: hr1001ags-z-etched.step / hr1001ags-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hr1001ags-z.step / hr1001ags-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Monolithic Power Systems datasheet (25 pp, sha256 d257aff97a168e85, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF