# HPESD12VS1ULD

**HXY MOSFET** · ESD And Surge Protection (TVS/ESD) · DFN1006-2L

HPESD12VS1ULD from HXY MOSFET, in a DFN1006-2L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Pin 1 is one of the two terminals of the unidirectional ESD protection diode that protects one data or control line, and the datasheet does not state which terminal is the line and which is the reference. |
| 2 | 2 | passive | Pin 2 is the second terminal of the unidirectional ESD protection diode that protects one data or control line, and the datasheet does not state its function or polarity. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | HXY MOSFET |
| Package | DFN1006-2L |
| Category | Circuit Protection |
| Pins | 2 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature Range | Tstg | -55 |  | 150 | °C |  | 1 |
| Maximum junction temperature | Tj |  |  | 150 | °C |  | 1 |
| Maximum lead temperature for soldering | TL |  |  | 260 | °C | during 10s | 1 |
| Peak Pulse Power | PPP |  |  | 150 | W | tp = 8/20 μs | 1 |
| Reverse Breakdown Voltage | VBR | 13.3 |  |  | V | IT = 1mA | 2 |
| Reverse Leakage Current | IR |  |  | 1000 | nA | VRWM = 12V | 2 |
| Reverse Working Voltage | VRWM |  |  | 12 | V |  | 2 |
| ESD IEC61000-4-2 air discharge |  |  |  | 15 | kV | IEC 61000-4-2 air discharge | 1 |
| ESD IEC61000-4-2 contact discharge |  |  |  | 8 | kV | IEC 61000-4-2 contact discharge | 1 |
| EFT IEC61000-4-4 |  |  |  | 40 | A | IEC 61000-4-4 (EFT) | 1 |

## CAD (KiCad official)

- Symbol: `HPESD12VS1ULD`
- Footprint: `Diode_SMD:D_SOD-882`
- 3D model: DFN1006-2L (KiCad packages3D, STEP)
- 3D model files: `hpesd12vs1uld-etched.step` / `hpesd12vs1uld-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hpesd12vs1uld.step` / `hpesd12vs1uld.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [HXY MOSFET datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603008852267061248) (4 pp, sha256 `41b3ab99f16dc8fc`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/hpesd12vs1uld-datasheet.pdf)