# HP8JE5TB1

**ROHM SEMICONDUCTOR** · Global Sourcing Parts · HSOP-8

HP8JE5TB1 from ROHM SEMICONDUCTOR, in a HSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Tr1 Source; P-channel MOSFET source, drain-source rated -100V. |
| 2 | G1 | input | Tr1 Gate; gate-source voltage limited to ±20V, threshold -1.0 to -2.5V. |
| 3 | S2 | passive | Tr2 Source; P-channel MOSFET source, drain-source rated -100V. |
| 4 | G2 | input | Tr2 Gate; gate-source voltage limited to ±20V, threshold -1.0 to -2.5V. |
| 5 | D2 | passive | Tr2 Drain; continuous drain current ±12.5A at Tc=25°C, pulsed ±18A. |
| 6 | D2 | passive | Tr2 Drain, internally common with pin 5; continuous drain current ±12.5A at Tc=25°C. |
| 7 | D1 | passive | Tr1 Drain; continuous drain current ±12.5A at Tc=25°C, pulsed ±18A. |
| 8 | D1 | passive | Tr1 Drain, internally common with pin 7; continuous drain current ±12.5A at Tc=25°C. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | ROHM SEMICONDUCTOR |
| Package | HSOP-8 |
| Category | Global Sourcing Parts |
| Pins | 9 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain - Source voltage | VDSS | -100 |  |  | V |  | 1 |
| Continuous drain current (Tc = 25°C) | ID | -12.5 |  | 12.5 | A | *1 Tc = 25°C | 1 |
| Continuous drain current (Ta = 25°C) | ID | -4.5 |  | 4.5 | A | Ta = 25°C | 1 |
| Pulsed drain current | IDP | -18 |  | 18 | A | *2 Pw ≤ 10μs, Duty cycle ≤ 1% | 1 |
| Gate - Source voltage | VGSS | -20 |  | 20 | V |  | 1 |
| Avalanche current, single pulse | IAS | -4.5 |  |  | A | *3 L ≈ 0.1mH, VDD = -50V, RG = 25Ω, Starting Tj = 25℃ | 1 |
| Avalanche energy, single pulse | EAS |  |  | 1.4 | mJ | *3 L ≈ 0.1mH, VDD = -50V, RG = 25Ω, Starting Tj = 25℃ | 1 |
| Power dissipation (total) | PD |  |  | 21 | W | *1 Tc = 25°C | 1 |
| Power dissipation (total) | PD |  |  | 3 | W | *4 Mounted on a Cu board (40×40×0.8mm) | 1 |
| Junction temperature | Tj |  |  | 150 | ℃ |  | 1 |
| Operating junction and storage temperature range | Tstg | -55 |  | 150 | ℃ |  | 1 |
| Thermal resistance, junction - case | RthJC |  |  | 5.52 | ℃/W | *1 Tc = 25℃, limited only by maximum temperature allowed | 2 |
| Thermal resistance, junction - ambient | RthJA |  |  | 41.7 | ℃/W | *4 Mounted on a Cu board (40×40×0.8mm) | 2 |
| Drain - Source breakdown voltage | V(BR)DSS | -100 |  |  | V | VGS = 0V, ID = -1mA | 2 |
| Zero gate voltage drain current | IDSS |  |  | -1 | μA | VDS = -100V, VGS = 0V | 2 |
| Gate - Source leakage current | IGSS | -100 |  | 100 | nA | VGS = ±20V, VDS = 0V | 2 |
| Gate threshold voltage | VGS(th) | -1 |  | -2.5 | V | VDS = VGS, ID = -1mA | 2 |
| Static drain - source on - state resistance | RDS(on) |  | 98 | 127 | mΩ | VGS = -10V, ID = -4.5A (pulsed) | 2 |
| Static drain - source on - state resistance | RDS(on) |  | 106 | 138 | mΩ | VGS = -4.5V, ID = -4.5A (pulsed) | 2 |
| Forward transfer admittance | /Yfs/ | 7 |  |  | S | VDS = -5V, ID = -4.5A (pulsed) | 2 |
| Continuous forward current | IS |  |  | -2.5 | A | Ta = 25℃ | 3 |
| Pulse forward current | ISP |  |  | -18 | A | *2 Pw ≤ 10μs, Duty cycle ≤ 1% | 3 |
| Forward voltage | VSD |  |  | -1.2 | V | VGS = 0V, IS = -2.5A (pulsed) | 3 |
| Breakdown voltage temperature coefficient | ΔV(BR)DSS/ΔTj |  | -68 |  | mV/℃ | ID = -1mA, referenced to 25℃ | 2 |
| Gate threshold voltage temperature coefficient | ΔVGS(th)/ΔTj |  | 3.7 |  | mV/℃ | ID = -1mA, referenced to 25℃ | 2 |
| Gate resistance | RG |  | 5.4 |  | Ω | f = 1MHz, open drain | 2 |
| Input capacitance | Ciss |  | 1370 |  | pF | VGS = 0V | 3 |
| Output capacitance | Coss |  | 120 |  | pF | VDS = -50V | 3 |
| Reverse transfer capacitance | Crss |  | 65 |  | pF | f = 1MHz | 3 |
| Turn - on delay time | td(on) |  | 13 |  | ns | VDD ≈ -50V, VGS = -10V | 3 |
| Rise time | tr |  | 12 |  | ns | ID = -2.25A | 3 |
| Turn - off delay time | td(off) |  | 117 |  | ns | RL = 22.2Ω | 3 |
| Fall time | tf |  | 90 |  | ns | RG = 10Ω | 3 |
| Total gate charge | Qg |  | 38 |  | nC | VDD ≈ -50V, ID = -4.5A, VGS = -10V | 3 |
| Total gate charge | Qg |  | 18.5 |  | nC | VDD ≈ -50V, ID = -4.5A, VGS = -4.5V | 3 |
| Gate - Source charge | Qgs |  | 3.7 |  | nC | VDD ≈ -50V, ID = -4.5A | 3 |
| Gate - Drain charge | Qgd |  | 7.8 |  | nC | VDD ≈ -50V, ID = -4.5A | 3 |
| Reverse recovery time | trr |  | 36 |  | ns | IS = -4.5A, VGS = 0V, di/dt = 100A/μs | 3 |
| Reverse recovery charge | Qrr |  | 67 |  | nC | IS = -4.5A, VGS = 0V, di/dt = 100A/μs | 3 |

## CAD (KiCad official)

- Symbol: `HP8JE5TB1`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: HSOP-8 (KiCad packages3D, STEP)
- 3D model files: `hp8je5tb1-etched.step` / `hp8je5tb1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hp8je5tb1.step` / `hp8je5tb1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [ROHM SEMICONDUCTOR datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603011881263386624) (14 pp, sha256 `fb9f8289bf68bc65`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/hp8je5tb1-datasheet.pdf)