component
HMT1040T
Public Made by Adomby adom
GATEMODE CAN ICs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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HMT1040T
GATEMODE · CAN ICs · SOP-8
HMT1040T from GATEMODE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | Transmit data input from the CAN protocol controller. TXD high drives the bus recessive; TXD low drives the bus dominant. |
| 2 | GND | power_in | Ground reference for the device. All non-differential voltages are referenced to this pin. |
| 3 | VCC | power_in | Supply voltage input, recommended 4.5 V to 5.5 V (absolute max 7 V). Powers the transceiver core and CAN bus driver. |
| 4 | RXD | output | Receive data output to the CAN protocol controller. RXD is high when the bus is recessive and low when the bus is dominant. |
| 5 | SPLIT | output | Common-mode stabilization output, nominally VCC/2 (0.3×VCC to 0.7×VCC for -500 µA < IO < 500 µA). Intended to bias the center tap of a split termination network. |
| 6 | CANL | bidirectional | Low-level CAN bus line. Differential CAN bus I/O with bus-fault protection from -50 V to +50 V. |
| 7 | CANH | bidirectional | High-level CAN bus line. Differential CAN bus I/O with bus-fault protection from -50 V to +50 V. |
| 8 | STB | input | Standby mode control input. STB low selects normal (high-speed) mode; STB high selects low-power standby with bus wake-up capability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GATEMODE |
| Package | SOP-8 |
| Category | Comm/UART |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
HMT1040TT
CAD (KiCad official)
- Symbol:
HMT1040T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
hmt1040t-etched.step/hmt1040t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hmt1040t.step/hmt1040t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GATEMODE datasheet (12 pp, sha256
043fd1e2b7d5f48d, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HMT1040T
**GATEMODE** · CAN ICs · SOP-8
HMT1040T from GATEMODE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | Transmit data input from the CAN protocol controller. TXD high drives the bus recessive; TXD low drives the bus dominant. |
| 2 | GND | power_in | Ground reference for the device. All non-differential voltages are referenced to this pin. |
| 3 | VCC | power_in | Supply voltage input, recommended 4.5 V to 5.5 V (absolute max 7 V). Powers the transceiver core and CAN bus driver. |
| 4 | RXD | output | Receive data output to the CAN protocol controller. RXD is high when the bus is recessive and low when the bus is dominant. |
| 5 | SPLIT | output | Common-mode stabilization output, nominally VCC/2 (0.3×VCC to 0.7×VCC for -500 µA < IO < 500 µA). Intended to bias the center tap of a split termination network. |
| 6 | CANL | bidirectional | Low-level CAN bus line. Differential CAN bus I/O with bus-fault protection from -50 V to +50 V. |
| 7 | CANH | bidirectional | High-level CAN bus line. Differential CAN bus I/O with bus-fault protection from -50 V to +50 V. |
| 8 | STB | input | Standby mode control input. STB low selects normal (high-speed) mode; STB high selects low-power standby with bus wake-up capability. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GATEMODE |
| Package | SOP-8 |
| Category | Comm/UART |
| Pins | 8 |
## Ordering variants
Same part, different packaging or reel option.
- `HMT1040TT`
## CAD (KiCad official)
- Symbol: `HMT1040T`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `hmt1040t-etched.step` / `hmt1040t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hmt1040t.step` / `hmt1040t.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [GATEMODE datasheet](docs/hmt1040t-datasheet.pdf) (12 pp, sha256 `043fd1e2b7d5f48d`, retrieved 2026-08-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/hmt1040t-datasheet.pdf)