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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

HMC830LP6GETR

Analog Devices · Clock Generators, PLLs, Frequency Synthesizers · VQFN-40-EP(6x6)

HMC830LP6GETR from Analog Devices, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	AVDD	power_in	DC power supply for analog circuitry, 3.3V nominal.
2	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
3	VPPCP	power_in	5V power supply for charge pump analog section.
4	CP	output	Charge pump output with 0.02 to 2.54mA current range.
5	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
6	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
7	VDD_LS	power_in	5V power supply for charge pump digital section.
8	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
9	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
10	RVDD	power_in	3.3V reference supply for reference input stage.
11	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
12	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
13	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
14	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
15	XREFP	input	Reference oscillator input, AC coupled, 1 to 3.3Vp-p, maximum 350MHz.
16	DVDD3V	power_in	3.3V DC power supply for digital (CMOS) circuitry.
17	CEN	input	Chip enable logic input; connect to logic high for normal operation.
18	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
19	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
20	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
21	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
22	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
23	VTUNE	input	VCO varactor tuning port input for frequency control.
24	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
25	VCC2	power_in	5V VCO core and VCO buffer analog supply.
26	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
27	VCC1	power_in	5V VCO divider and RF/PLL buffer analog supply.
28	RF_N	output	RF negative output, active in differential configuration and single-ended configuration.
29	RF_P	output	RF positive output, active in differential configuration and off in single-ended configuration.
30	SEN	input	PLL serial port enable CMOS logic input.
31	SDI	input	PLL serial port data CMOS logic input.
32	SCK	input	PLL serial port clock CMOS logic input.
33	LD_SDO	output	Lock detect output or serial data output or general purpose CMOS logic output (multiplexed).
34	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
35	VCCHF	power_in	3.3V DC power supply for analog circuitry (high frequency).
36	VCCPS	power_in	3.3V DC power supply for analog prescaler.
37	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
38	N/C	unconnected	Not connected internally; however, all data measured with these pins connected to RF/DC ground externally.
39	VCCPD	power_in	3.3V DC power supply for phase detector.
40	BIAS	passive	Precision bias reference (1.920V ±20mV) output for external bypass decoupling; generated internally and cannot drive external load.
41	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	VQFN-40-EP(6x6)
Category	Clock/Timing
Pins	41

CAD (KiCad official)

Symbol: HMC830LP6GETR
Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
3D model files: hmc830lp6getr-etched.step / hmc830lp6getr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hmc830lp6getr.step / hmc830lp6getr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (14 pp, sha256 d3ffd0fd7afda10f, retrieved 2026-09-22, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF