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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

HK32F103RET6

HK · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

HK32F103RET6 from HK, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBAT	power_in	Backup-domain supply, 1.8 V to 3.6 V, powering the RTC, the external 32.768 kHz oscillator and the backup registers when VDD is off.
2	PC13/TAMPER-RTC	bidirectional	I/O PC13 with TAMPER-RTC, WKUP1 and RTCO alternate functions and EXTIN13; footnote (3) applies to this pin.
3	PC14/OSC32_IN	bidirectional	I/O PC14 that serves as the LSE oscillator input OSC32_IN (also LSE_CKI) and EXTIN14; footnote (3) applies to this pin.
4	PC15/OSC32_OUT	bidirectional	I/O PC15 that serves as the LSE oscillator output OSC32_OUT and EXTIN15; footnote (3) applies to this pin.
5	PD0/OSC_IN	bidirectional	I/O PD0 whose default function is the HSE oscillator input OSC_IN (also HSE_CKI), supporting 4 to 32 MHz crystals or external clock input.
6	PD1/OSC_OUT	bidirectional	I/O PD1 whose default function is the HSE oscillator output OSC_OUT, used with the 4 to 32 MHz crystal.
7	NRST	bidirectional	Active-low reset pin with internal weak pull-up (about 50 kΩ); VIL max 0.8 V, Schmitt hysteresis 200 mV, low pulses under 100 ns are ignored.
8	PC0	bidirectional	General-purpose I/O PC0 with ADC123_IN10 analog input and EXTIN0 alternate functions.
9	PC1	bidirectional	General-purpose I/O PC1 with ADC123_IN11 analog input and EXTIN1 alternate functions.
10	PC2	bidirectional	General-purpose I/O PC2 with ADC123_IN12 analog input and EXTIN2 alternate functions.
11	PC3	bidirectional	General-purpose I/O PC3 with ADC123_IN13 analog input and EXTIN3 alternate functions.
12	VSSA	power_in	Analog ground for the ADC, DAC and temperature sensor.
13	VDDA	power_in	Analog supply for the ADC, DAC and temperature sensor, 2.0 V to 3.6 V; the datasheet recommends using the same supply as VDD.
14	PA0/WKUP	bidirectional	I/O PA0 with WKUP0 wake-up, ADC123_IN0, USART2_CTS, TIM2/TIM5/TIM8 timer alternate functions and EXTIN0; the level column is marked (2), i.e. 5 V tolerant per footnote (2).
15	PA1	bidirectional	General-purpose I/O PA1 with USART2_RTS, ADC123_IN1, TIM5_CH2, TIM2_CH2 and EXTIN1 alternate functions; also usable as GPIO external clock input (up to 64 MHz).
16	PA2	bidirectional	General-purpose I/O PA2 with USART2_TX, TIM5_CH3, ADC123_IN2, TIM2_CH3 and EXTIN2 alternate functions.
17	PA3	bidirectional	General-purpose I/O PA3 with USART2_RX, TIM5_CH4, ADC123_IN3, TIM2_CH4 and EXTIN3 alternate functions.
18	VSS_4	power_in	Digital ground pin; all VSS pins must be connected to the external ground supply.
19	VDD_4	power_in	Digital supply for I/O and internal LDO, 2.0 V to 3.6 V.
20	PA4	bidirectional	General-purpose I/O PA4 with SPI1_NSS, USART2_CK, DAC1_OUT, ADC12_IN4 and EXTIN4 alternate functions.
21	PA5	bidirectional	General-purpose I/O PA5 with SPI1_SCK, DAC2_OUT, ADC12_IN5 and EXTIN5 alternate functions.
22	PA6	bidirectional	General-purpose I/O PA6 with SPI1_MISO, TIM8_BKIN, ADC12_IN6, TIM3_CH1, EXTIN6 and TIM1_BKIN alternate functions.
23	PA7	bidirectional	General-purpose I/O PA7 with SPI1_MOSI, TIM8_CH1N, ADC12_IN7, TIM3_CH2, EXTIN7 and TIM1_CH1N alternate functions.
24	PC4	bidirectional	General-purpose I/O PC4 with ADC12_IN14 analog input and EXTIN4 alternate function.
25	PC5	bidirectional	General-purpose I/O PC5 with ADC12_IN15 analog input and EXTIN5 alternate function.
26	PB0	bidirectional	I/O PB0 with ADC12_IN8, TIM3_CH3, TIM8_CH2N, TIM1_CH2N and EXTIN0 alternate functions; footnote (3) applies to this pin.
27	PB1	bidirectional	General-purpose I/O PB1 with ADC12_IN9, TIM3_CH4, TIM8_CH3N, TIM1_CH3N and EXTIN1 alternate functions.
28	PB2	bidirectional	5 V tolerant I/O PB2 that is sampled as BOOT1 at startup and has a weak internal pull-down (footnote 4); also EXTIN2.
29	PB10	bidirectional	General-purpose I/O PB10 with I2C2_SCL, USART3_TX, TIM2_CH3 and EXTIN10 alternate functions.
30	PB11	bidirectional	General-purpose I/O PB11 with I2C2_SDA, USART3_RX, TIM2_CH4 and EXTIN11 alternate functions.
31	VSS_1	power_in	Digital ground pin; all VSS pins must be connected to the external ground supply.
32	VDD_1	power_in	Digital supply for I/O and internal LDO, 2.0 V to 3.6 V.
33	PB12	bidirectional	5 V tolerant I/O PB12 with SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN and EXTIN12 alternate functions.
34	PB13	bidirectional	5 V tolerant I/O PB13 with SPI2_SCK, I2S2_CK, USART3_CTS, TIM1_CH1N and EXTIN13 alternate functions.
35	PB14	bidirectional	5 V tolerant I/O PB14 with SPI2_MISO, TIM1_CH2N, USART3_RTS and EXTIN14 alternate functions.
36	PB15	bidirectional	5 V tolerant I/O PB15 with SPI2_MOSI, I2S2_SD, TIM1_CH3N and EXTIN15 alternate functions.
37	PC6	bidirectional	5 V tolerant I/O PC6 with I2S2_MCK, TIM8_CH1, SDIO_D6, TIM3_CH1 and EXTIN6 alternate functions.
38	PC7	bidirectional	5 V tolerant I/O PC7 with I2S3_MCK, TIM8_CH2, SDIO_D7, TIM3_CH2 and EXTIN7 alternate functions; also usable as GPIO external clock input.
39	PC8	bidirectional	5 V tolerant I/O PC8 with TIM8_CH3, SDIO_D0, TIM3_CH3 and EXTIN8 alternate functions.
40	PC9	bidirectional	5 V tolerant I/O PC9 with TIM8_CH4, SDIO_D1, TIM3_CH4 and EXTIN9 alternate functions.
41	PA8	bidirectional	5 V tolerant I/O PA8 with USART1_CK, TIM1_CH1, RCC_MCO and EXTIN8 alternate functions.
42	PA9	bidirectional	5 V tolerant I/O PA9 with USART1_TX, TIM1_CH2 and EXTIN9 alternate functions.
43	PA10	bidirectional	5 V tolerant I/O PA10 with USART1_RX, TIM1_CH3 and EXTIN10 alternate functions.
44	PA11	bidirectional	5 V tolerant I/O PA11 with USART1_CTS, USB_DM, CAN1_RX, TIM1_CH4 and EXTIN11 alternate functions.
45	PA12	bidirectional	5 V tolerant I/O PA12 with USART1_RTS, USB_DP, CAN1_TX, TIM1_ETR and EXTIN12 alternate functions.
46	PA13/JTMS-SWDIO	bidirectional	5 V tolerant I/O PA13 whose default function is the JTAG/SWD data pin JTMS-SWDIO.
47	VSS_2	power_in	Digital ground pin; all VSS pins must be connected to the external ground supply.
48	VDD_2	power_in	Digital supply for I/O and internal LDO, 2.0 V to 3.6 V.
49	PA14/JTCK-SWCLK	bidirectional	5 V tolerant I/O PA14 whose default function is the JTAG/SWD clock pin JTCK-SWCLK; also EXTIN14.
50	PA15/JTDI	bidirectional	5 V tolerant I/O PA15 whose default function is the JTAG data input JTDI, with SPI3_NSS, I2S3_WS, TIM2_CH1_ETR and SPI1_NSS alternates.
51	PC10	bidirectional	General-purpose I/O PC10 with UART4_TX, SDIO_D2, USART3_TX and EXTIN10 alternate functions.
52	PC11	bidirectional	General-purpose I/O PC11 with UART4_RX, SDIO_D3, USART3_RX and EXTIN11 alternate functions.
53	PC12	bidirectional	General-purpose I/O PC12 with UART5_TX, SDIO_CK, USART3_CK and EXTIN12 alternate functions.
54	PD2	bidirectional	General-purpose I/O PD2 with TIM3_ETR, UART5_RX, SDIO_CMD and EXTIN2 alternate functions.
55	PB3/JTDO	bidirectional	General-purpose I/O PB3 whose default function is the JTAG output JTDO, with TRACESWO, SPI3_SCK, I2S3_CK, TIM2_CH2, SPI1_SCK and EXTIN3 alternates.
56	PB4/NJRST	bidirectional	General-purpose I/O PB4 whose default function is the JTAG reset NJTRST, with SPI3_MISO, TIM3_CH1, SPI1_MISO and EXTIN4 alternates.
57	PB5	bidirectional	General-purpose I/O PB5 with I2C1_SMBA, SPI3_MOSI, I2S3_SD, TIM3_CH2, SPI1_MOSI and EXTIN5 alternate functions.
58	PB6	bidirectional	General-purpose I/O PB6 with I2C1_SCL, TIM4_CH1, USART1_TX and EXTIN6 alternate functions.
59	PB7	bidirectional	5 V tolerant I/O PB7 with I2C1_SDA, FSMC_NADV, TIM4_CH2, USART1_RX and EXTIN7 alternate functions.
60	BOOT0	input	Boot-mode select input sampled at startup, with an internal weak pull-down (footnote 4).
61	PB8	bidirectional	General-purpose I/O PB8 with TIM4_CH3, SDIO_D4, I2C1_SCL, CAN1_RX and EXTIN8 alternate functions.
62	PB9	bidirectional	General-purpose I/O PB9 with TIM4_CH4, SDIO_D5, I2C1_SDA, CAN1_TX and EXTIN9 alternate functions.
63	VSS_3	power_in	Digital ground pin; all VSS pins must be connected to the external ground supply.
64	VDD_3	power_in	Digital supply for I/O and internal LDO, 2.0 V to 3.6 V.

Key specifications

Parameter	Value
Manufacturer	HK
Package	LQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

CAD (KiCad official)

Symbol: HK32F103RET6
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: hk32f103ret6-etched.step / hk32f103ret6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hk32f103ret6.step / hk32f103ret6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: HK datasheet (50 pp, sha256 a218fc6474e5baa4, retrieved 2026-10-20, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF