# HK32F103RCT6

**HK(航顺)** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

HK32F103RCT6 from HK(航顺), in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply input, 1.8 V to 3.6 V, that powers the RTC, the 32.768 kHz oscillator and the backup registers when VDD is off. |
| 2 | PC13/TAMPER-RTC | bidirectional | General-purpose I/O with no Schmitt trigger (table footnote 3) and alternate functions TAMPER-RTC, WKUP1 and RTCO. |
| 3 | PC14/OSC32_IN | bidirectional | General-purpose I/O with no Schmitt trigger (table footnote 3) that is also the LSE oscillator input OSC32_IN for a 32.768 kHz crystal. |
| 4 | PC15/OSC32_OUT | bidirectional | General-purpose I/O with no Schmitt trigger (table footnote 3) that is also the LSE oscillator output OSC32_OUT. |
| 5 | PD0/OSC_IN | bidirectional | On the LQFP64 package this pin is the HSE oscillator input OSC_IN (also HSE_CKI external clock input), with no 5 V tolerance listed. |
| 6 | PD1/OSC_OUT | bidirectional | On the LQFP64 package this pin is the HSE oscillator output OSC_OUT, with no 5 V tolerance listed. |
| 7 | NRST | bidirectional | Active-low reset pin with an internal weak pull-up of at most 50 kΩ; VIL max is 0.8 V and VIH min is 2 V (section 4.2.15). |
| 8 | PC0 | bidirectional | General-purpose I/O with Schmitt input and alternate functions ADC123_IN10 and EXTIN0. |
| 9 | PC1 | bidirectional | General-purpose I/O with Schmitt input and alternate functions ADC123_IN11 and EXTIN1. |
| 10 | PC2 | bidirectional | General-purpose I/O with Schmitt input and alternate functions ADC123_IN12 and EXTIN2. |
| 11 | PC3 | bidirectional | General-purpose I/O with Schmitt input and alternate functions ADC123_IN13 and EXTIN3. |
| 12 | VSSA | power_in | Analog ground for the ADC, temperature sensor and reference circuits. |
| 13 | VDDA | power_in | Analog supply, 2.0 V to 3.6 V, for the ADC and temperature sensor; the datasheet recommends the same supply as VDD. |
| 14 | PA0/WKUP | bidirectional | 5 V tolerant (FT) I/O with WKUP0 wake-up input, ADC123_IN0 analog input, USART2_CTS and timer alternate functions. |
| 15 | PA1 | bidirectional | General-purpose I/O with alternate functions USART2_RTS, ADC123_IN1, TIM5_CH2 and TIM2_CH2. |
| 16 | PA2 | bidirectional | General-purpose I/O with alternate functions USART2_TX, TIM5_CH3, ADC123_IN2 and TIM2_CH3. |
| 17 | PA3 | bidirectional | General-purpose I/O with alternate functions USART2_RX, TIM5_CH4, ADC123_IN3 and TIM2_CH4. |
| 18 | VSS_4 | power_in | Ground pin of the digital supply; all VSS pins must be connected to the external supply system. |
| 19 | VDD_4 | power_in | Digital supply pin for the I/O and internal LDO, 2.0 V to 3.6 V. |
| 20 | PA4 | bidirectional | General-purpose I/O with alternate functions SPI1_NSS, USART2_CK, DAC1_OUT, ADC12_IN4 and EXTIN4. |
| 21 | PA5 | bidirectional | General-purpose I/O with alternate functions SPI1_SCK, DAC2_OUT, ADC12_IN5 and EXTIN5. |
| 22 | PA6 | bidirectional | General-purpose I/O with alternate functions SPI1_MISO, TIM8_BKIN, ADC12_IN6 and TIM3_CH1. |
| 23 | PA7 | bidirectional | General-purpose I/O with alternate functions SPI1_MOSI, TIM8_CH1N, ADC12_IN7 and TIM3_CH2. |
| 24 | PC4 | bidirectional | General-purpose I/O with alternate function ADC12_IN14 and EXTIN4. |
| 25 | PC5 | bidirectional | General-purpose I/O with alternate function ADC12_IN15 and EXTIN5. |
| 26 | PB0 | bidirectional | General-purpose I/O with no Schmitt trigger (table footnote 3) and alternate functions ADC12_IN8, TIM3_CH3 and TIM8_CH2N. |
| 27 | PB1 | bidirectional | General-purpose I/O with alternate functions ADC12_IN9, TIM3_CH4 and TIM8_CH3N; this pin is also listed as a GPIO external clock input (section 3.11.1). |
| 28 | PB2 | bidirectional | 5 V tolerant (FT) I/O that is also the BOOT1 boot-mode pin (table footnote 4) with EXTIN2. |
| 29 | PB10 | bidirectional | General-purpose I/O with alternate functions I2C2_SCL and USART3_TX. |
| 30 | PB11 | bidirectional | General-purpose I/O with alternate functions I2C2_SDA and USART3_RX. |
| 31 | VSS_1 | power_in | Ground pin of the digital supply; all VSS pins must be connected to the external supply system. |
| 32 | VDD_1 | power_in | Digital supply pin for the I/O and internal LDO, 2.0 V to 3.6 V. |
| 33 | PB12 | bidirectional | 5 V tolerant (FT) I/O with alternate functions SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK and TIM1_BKIN. |
| 34 | PB13 | bidirectional | 5 V tolerant (FT) I/O with alternate functions SPI2_SCK, I2S2_CK, USART3_CTS and TIM1_CH1N. |
| 35 | PB14 | bidirectional | 5 V tolerant (FT) I/O with alternate functions SPI2_MISO, TIM1_CH2N and USART3_RTS. |
| 36 | PB15 | bidirectional | 5 V tolerant (FT) I/O with alternate functions SPI2_MOSI, I2S2_SD and TIM1_CH3N. |
| 37 | PC6 | bidirectional | 5 V tolerant (FT) I/O with alternate functions I2S2_MCK, TIM8_CH1, SDIO_D6 and TIM3_CH1. |
| 38 | PC7 | bidirectional | 5 V tolerant (FT) I/O with alternate functions I2S3_MCK, TIM8_CH2, SDIO_D7 and TIM3_CH2; it is also a GPIO external clock input (section 3.11.1). |
| 39 | PC8 | bidirectional | 5 V tolerant (FT) I/O with alternate functions TIM8_CH3, SDIO_D0 and TIM3_CH3. |
| 40 | PC9 | bidirectional | 5 V tolerant (FT) I/O with alternate functions TIM8_CH4, SDIO_D1 and TIM3_CH4. |
| 41 | PA8 | bidirectional | 5 V tolerant (FT) I/O with alternate functions USART1_CK, TIM1_CH1, RCC_MCO and EXTIN8. |
| 42 | PA9 | bidirectional | 5 V tolerant (FT) I/O with alternate functions USART1_TX, TIM1_CH2 and EXTIN9. |
| 43 | PA10 | bidirectional | 5 V tolerant (FT) I/O with alternate functions USART1_RX, TIM1_CH3 and EXTIN10. |
| 44 | PA11 | bidirectional | 5 V tolerant (FT) I/O with alternate functions USART1_CTS, USB_DM, CAN1_RX and TIM1_CH4. |
| 45 | PA12 | bidirectional | 5 V tolerant (FT) I/O with alternate functions USART1_RTS, USB_DP, CAN1_TX and TIM1_ETR. |
| 46 | PA13/JTMS-SWDIO | bidirectional | 5 V tolerant (FT) pin that serves as the JTAG TMS / SWD data I/O (SWDIO) debug function. |
| 47 | VSS_2 | power_in | Ground pin of the digital supply; all VSS pins must be connected to the external supply system. |
| 48 | VDD_2 | power_in | Digital supply pin for the I/O and internal LDO, 2.0 V to 3.6 V. |
| 49 | PA14/JTCK-SWCLK | bidirectional | 5 V tolerant (FT) pin that serves as the JTAG TCK / SWD clock (SWCLK) debug function. |
| 50 | PA15/JTDI | bidirectional | 5 V tolerant (FT) pin with JTDI debug function and alternate functions SPI3_NSS, I2S3_WS, SPI1_NSS and TIM2_CH1_ETR. |
| 51 | PC10 | bidirectional | General-purpose I/O with alternate functions UART4_TX, SDIO_D2 and USART3_TX. |
| 52 | PC11 | bidirectional | General-purpose I/O with alternate functions UART4_RX, SDIO_D3 and USART3_RX. |
| 53 | PC12 | bidirectional | General-purpose I/O with alternate functions UART5_TX, SDIO_CK and USART3_CK. |
| 54 | PD2 | bidirectional | General-purpose I/O with alternate functions TIM3_ETR, UART5_RX, SDIO_CMD and EXTIN2. |
| 55 | PB3/JTDO | bidirectional | General-purpose I/O that also carries the JTDO / TRACESWO debug function, with alternate functions SPI3_SCK, I2S3_CK, TIM2_CH2 and SPI1_SCK. |
| 56 | PB4/NJRST | bidirectional | General-purpose I/O that also carries the NJTRST (JTAG reset) debug function, with alternate functions SPI3_MISO, TIM3_CH1 and SPI1_MISO. |
| 57 | PB5 | bidirectional | General-purpose I/O with alternate functions I2C1_SMBA, SPI3_MOSI, I2S3_SD, TIM3_CH2 and SPI1_MOSI. |
| 58 | PB6 | bidirectional | General-purpose I/O with alternate functions I2C1_SCL, TIM4_CH1 and USART1_TX. |
| 59 | PB7 | bidirectional | 5 V tolerant (FT) I/O with alternate functions I2C1_SDA, FSMC_NADV, TIM4_CH2 and USART1_RX; it is also a GPIO external clock input (section 3.11.1). |
| 60 | BOOT0 | input | Boot-mode selection input with an internal weak pull-down resistor (table footnote 4). |
| 61 | PB8 | bidirectional | General-purpose I/O with alternate functions TIM4_CH3, SDIO_D4, I2C1_SCL and CAN1_RX. |
| 62 | PB9 | bidirectional | General-purpose I/O with alternate functions TIM4_CH4, SDIO_D5, I2C1_SDA and CAN1_TX. |
| 63 | VSS_3 | power_in | Ground pin of the digital supply; all VSS pins must be connected to the external supply system. |
| 64 | VDD_3 | power_in | Digital supply pin for the I/O and internal LDO, 2.0 V to 3.6 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | HK(航顺) |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |

## CAD (KiCad official)

- Symbol: `HK32F103RCT6`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `hk32f103rct6-etched.step` / `hk32f103rct6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hk32f103rct6.step` / `hk32f103rct6.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [HK(航顺) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589041800481026048) (49 pp, sha256 `27d979e624dde054`, retrieved 2026-10-20, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/hk32f103rct6-datasheet.pdf)