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HK32F103CBT6A

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HK Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HK32F103CBT6A

HK · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

HK32F103CBT6A from HK, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup-domain supply input of 1.8 V to 3.6 V that powers the RTC, the 32 kHz oscillator and backup registers when VDD is off.
2 PC13 bidirectional General-purpose I/O PC13 with TAMPER-RTC/WKUP1/RTCO and EXTIN13 functions listed in the pinout table.
3 PC14 bidirectional General-purpose I/O PC14 that doubles as OSC32_IN/LSE_CKI for the 32.768 kHz LSE clock input.
4 PC15 bidirectional General-purpose I/O PC15 that doubles as OSC32_OUT for the 32.768 kHz LSE crystal.
5 OSC_IN input HSE oscillator input (OSC_IN/HSE_CKI, also remappable to PD0) for a crystal or external clock; section 3.9.1 gives 4-32 MHz crystal and up to 64 MHz external clock, while section 4.2.4 gives 1-25 MHz.
6 OSC_OUT output HSE oscillator output (OSC_OUT, also remappable to PD1) driving the external crystal.
7 NRST bidirectional External reset pin (I/O in the pinout table) that is one of the listed reset sources; the text gives no electrical thresholds for this pin.
8 VSSA power_in Analog ground for the ADC and temperature sensor.
9 VDDA power_in Analog supply of 2.0 V to 3.6 V for the ADC and temperature sensor, recommended to be the same supply as VDD with at most 300 mV difference between them.
10 PA0 bidirectional General-purpose I/O PA0 with WKUP0, USART2_CTS, ADC12_IN0, TIM2_CH1_ETR, TIM5_CH1, TIM8_ETR and EXTIN0 alternate functions.
11 PA1 bidirectional General-purpose I/O PA1 with USART2_RTS, ADC12_IN1, TIM5_CH2, TIM2_CH2, RCC_CKI0 and EXTIN1 alternate functions.
12 PA2 bidirectional General-purpose I/O PA2 with USART2_TX, ADC12_IN2, TIM5_CH3, TIM2_CH3 and EXTIN2 alternate functions.
13 PA3 bidirectional General-purpose I/O PA3 with USART2_RX, ADC12_IN3, TIM5_CH4, TIM2_CH4 and EXTIN3 alternate functions.
14 PA4 bidirectional General-purpose I/O PA4 with SPI1_NSS, USART2_CK, ADC12_IN4 and EXTIN4 alternate functions.
15 PA5 bidirectional General-purpose I/O PA5 with SPI1_SCK, ADC12_IN5 and EXTIN5 alternate functions.
16 PA6 bidirectional General-purpose I/O PA6 with SPI1_MISO, ADC12_IN6, TIM3_CH1, TIM1_BKIN and EXTIN6 alternate functions.
17 PA7 bidirectional General-purpose I/O PA7 with SPI1_MOSI, ADC12_IN7, TIM3_CH2, TIM1_CH1N and EXTIN7 alternate functions.
18 PB0 bidirectional General-purpose I/O PB0 with ADC12_IN8, TIM3_CH3, TIM1_CH2N and EXTIN0 alternate functions.
19 PB1 bidirectional General-purpose I/O PB1 with ADC12_IN9, TIM3_CH4, RCC_CKI1, TIM1_CH3N and EXTIN1 alternate functions.
20 PB2 bidirectional General-purpose I/O PB2 that also serves as the BOOT1 boot-mode pin and EXTIN2.
21 PB10 bidirectional General-purpose I/O PB10 with I2C2_SCL, USART3_TX, TIM2_CH3 and EXTIN10 alternate functions.
22 PB11 bidirectional General-purpose I/O PB11 with I2C2_SDA, USART3_RX, TIM2_CH4 and EXTIN11 alternate functions.
23 VSS_1 power_in Ground pin for the digital core and I/O.
24 VDD_1 power_in Digital supply of 2.0 V to 3.6 V that powers the I/O pins and the internal LDO.
25 PB12 bidirectional General-purpose I/O PB12 with SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN and EXTIN12 alternate functions.
26 PB13 bidirectional General-purpose I/O PB13 with SPI2_SCK, I2S2_CK, USART3_CTS, TIM1_CH1N and EXTIN13 alternate functions.
27 PB14 bidirectional General-purpose I/O PB14 with SPI2_MISO, TIM1_CH2N, USART3_RTS and EXTIN14 alternate functions.
28 PB15 bidirectional General-purpose I/O PB15 with SPI2_MOSI, TIM1_CH3N and EXTIN15 alternate functions.
29 PA8 bidirectional General-purpose I/O PA8 with USART1_CK, TIM1_CH1, MCO and EXTIN8 alternate functions.
30 PA9 bidirectional General-purpose I/O PA9 with USART1_TX, TIM1_CH2 and EXTIN9 alternate functions.
31 PA10 bidirectional General-purpose I/O PA10 with USART1_RX, TIM1_CH3 and EXTIN10 alternate functions.
32 PA11 bidirectional General-purpose I/O PA11 with USART1_CTS, USBDM, CAN1_RX, TIM1_CH4 and EXTIN11 alternate functions.
33 PA12 bidirectional General-purpose I/O PA12 with USART1_RTS, USBDP, CAN1_TX, TIM1_ETR and EXTIN12 alternate functions.
34 PA13 bidirectional Serial-wire debug data pin JTMS-SWDIO that can also be used as general-purpose I/O PA13.
35 VSS_2 power_in Ground pin for the digital core and I/O.
36 VDD_2 power_in Digital supply of 2.0 V to 3.6 V that powers the I/O pins and the internal LDO.
37 PA14 bidirectional Serial-wire clock pin JTCK-SWCLK that can also be used as general-purpose I/O PA14.
38 PA15 bidirectional JTAG data-input pin JTDI that can also be used as general-purpose I/O PA15 with SPI1_NSS and TIM2_CH1_ETR alternates.
39 PB3 bidirectional JTAG data-output pin JTDO / TRACESWO that can also be used as general-purpose I/O PB3 with SPI1_SCK and TIM2_CH2.
40 PB4 bidirectional JTAG reset pin NJTRST that can also be used as general-purpose I/O PB4 with TIM3_CH1 and SPI1_MISO.
41 PB5 bidirectional General-purpose I/O PB5 with I2C1_SMBA, TIM3_CH2, SPI1_MOSI and EXTIN5 alternate functions.
42 PB6 bidirectional General-purpose I/O PB6 with I2C1_SCL, TIM4_CH1, USART1_TX and EXTIN6 alternate functions.
43 PB7 bidirectional General-purpose I/O PB7 with I2C1_SDA, TIM4_CH2, RCC_CKI3, USART1_RX and EXTIN7 alternate functions.
44 BOOT0 input Boot-mode select pin that, together with BOOT1 (PB2), chooses between user flash, system memory and internal SRAM boot at startup.
45 PB8 bidirectional General-purpose I/O PB8 with TIM4_CH3, SDIO_D4, I2C1_SCL, CAN1_RX and EXTIN8 alternate functions.
46 PB9 bidirectional General-purpose I/O PB9 with TIM4_CH4, I2C1_SDA, CAN1_TX and EXTIN9 alternate functions.
47 VSS_3 power_in Ground pin for the digital core and I/O.
48 VDD_3 power_in Digital supply of 2.0 V to 3.6 V that powers the I/O pins and the internal LDO.

Key specifications

Parameter Value
Manufacturer HK
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External main supply voltage (VDD, VDDA) relative to VSS VDD-VSS -0.5 6 V 25
Voltage difference between different supply pins /ΔVDDx/ 50 mV 25
Voltage difference between different ground pins /VSSX − VSS/ 50 mV 25
Total current through VDD/VDDA supply line (supply current) IVDD 150 mA 25
Total current through VSS ground line (outflow current) IVSS 150 mA 25
Output sink current on any I/O and control pin IIO 25 mA 25
Output source current on any I/O and control pin IIO -25 mA 25
Injection current on a pin IINJ(PIN) -5 5 mA 25
Total injection current on all I/O and control pins ΣIINJ(PIN) -25 25 mA 25
Storage temperature range TSTG -45 150 °C 25
Maximum junction temperature TJ 125 °C 25
Internal AHB clock frequency fHCLK 0 96 MHz 26
Internal APB1 clock frequency fPCLK1 0 48 MHz 26
Internal APB2 clock frequency fPCLK2 0 96 MHz 26
Standard operating voltage VDD 2 3.6 V 26
Analog operating voltage VDDA 2 3.6 V Note1: VDD and VDDA difference max 300mV 26
Backup part operating voltage VBAT 1.8 3.6 V 26
Operating temperature T -40 105 °C 26
Reset setup time Tdelay rstn 40 us 26
Reset threshold voltage VThreshold 1.75 V 26
Input high-level voltage VIH 3.6 V VDD>2V 31
Input low-level voltage VIL -0.3 V 31
Input leakage current Ilkg 3 uA VIN =5V 31
Weak pull-up equivalent resistor RPU 30 40 50 KΩ VIN=VSS 31
Weak pull-down equivalent resistor RPD 30 40 50 KΩ VIN=VDD 31
Single-byte program time TPROG 6 7.5 µs 30
Page erase time TERASE 4 5 ms 30
Whole-chip erase time TERASE 30 40 ms 30
Single-byte program current IDDPROG 5 mA 30
Page/chip erase current IDDERASE 2 mA 30
Read current @24MHz IDDREAD 2 3 mA @24MHz 30
Read current @1MHz IDDREAD 0.25 0.4 mA @1MHz 30
Programming voltage Vprog 2 3.3 3.6 V 30
PLL input clock frequency fPLL_IN 1 8 25 MHz 29
PLL input clock duty cycle 40 60 % 29
PLL output clock frequency fPLL_OUT 16 96 MHz 29
PLL lock time tLOCK 200 us 29
PLL cycle jitter Jitter 300 ps 29
External high-speed clock frequency (HSE) fHSE_ext 1 8 25 MHz 28
HSE input valid high/low level time Tw(HSE) 5 ns 28
HSE input rise/fall time Tr(HSE)/Tf(HSE) 20 ns 28
HSE input duty cycle DuCy(HSE) 45 55 % 28
External low-speed clock frequency (LSE) FLSE_ext 32.768 1000 kHz 28
LSE input rise/fall time Tr(LSE)/Tf(LSE) 50 ns 28
LSE input duty cycle DuCy(LSE) 30 70 % 28
HSI clock duty cycle DuCy(HSI) 45 55 % 29
HSI oscillator accuracy (factory calibrated) ACCHSI -2 2.5 % Factory calibrated; TA = -40 to 105 °C 29
HSI oscillator accuracy (factory calibrated) ACCHSI -1.5 2.2 % Factory calibrated; TA = -40 to 85 °C 29
HSI oscillator accuracy (factory calibrated) ACCHSI -1.3 2 % Factory calibrated; TA = 0 to 70 °C 29
HSI oscillator accuracy (factory calibrated) ACCHSI -1.1 1.8 % Factory calibrated; TA = 25 °C 29
HSI oscillator startup time Tsu(HSI) 1 2 us VSS≤VIN≤VDD 29
HSI oscillator power consumption IDD(HSI) 80 100 uA 29
LSI clock frequency fLSI 30 40 60 kHz 29
LSI oscillator startup time tsu(LSI) 85 us 29
ADC analog supply voltage 2 3.3 3.6 V 34
ADC offset error -16 16 LSB 34
Temperature sensor analog supply voltage 2.2 3.3 3.6 V 35
Sensor output voltage at 25℃ 1.34 1.43 1.52 V 35
Sensor gain 4 4.3 4.6 mV/℃ 35

CAD (KiCad official)

  • Symbol: HK32F103CBT6A
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: hk32f103cbt6a-etched.step / hk32f103cbt6a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hk32f103cbt6a.step / hk32f103cbt6a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HK datasheet (63 pp, sha256 bf0fa4f90326530e, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF