component

HK32F030MJ4M6

Public Made by Adom

by adom

HK Microcontroller Units (MCUs/MPUs/SOCs), SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllershk32f030mj4m6factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2d ago
viewers hk32f030mj4m6: viewers · Ray 2d ago
hk32f030mj4m6-etched.glb Publish 0.1.0 · Ray 2d ago
hk32f030mj4m6-etched.step hk32f030mj4m6: factory component page (tier=lcsc) · Ray 2d ago
hk32f030mj4m6-hero.glb hk32f030mj4m6: hero GLB from the etched model (keeps the MPN mark) · Ray 2d ago
hk32f030mj4m6-hero.overlay.json Publish 0.1.0 · Ray 2d ago
hk32f030mj4m6.glb Publish 0.1.0 · Ray 2d ago
hk32f030mj4m6.kicad_mod Publish 0.1.0 · Ray 2d ago
hk32f030mj4m6.kicad_sym Publish 0.1.0 · Ray 2d ago
hk32f030mj4m6.lbr Publish 0.1.0 · Ray 2d ago
hk32f030mj4m6.step Publish 0.1.0 · Ray 2d ago
package.json Publish 0.1.0 · Ray 2d ago
page.json Set visibility: public · Ray 2d ago
README.md Publish 0.1.0 · Ray 2d ago

HK32F030MJ4M6

HK · Microcontroller Units (MCUs/MPUs/SOCs) · SO-8

HK32F030MJ4M6 from HK, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PD6/AIN1 bidirectional GPIO PD6 (default function after power-on) with ADC analog input AIN1; IOMUX can remap this pin to PA1/HSECLK1, PD4 or PA2.
2 VSS/VSSA power_in Ground; digital ground and analog ground are connected on chip.
3 VCAP/PD7/HSECLK2 bidirectional GPIO PD7 by default (alternate function I2C1_SMBA) that can also serve as the HSECLK2 external clock input.
4 VDD/VDDA power_in Power supply; digital and analog power are connected on chip, with an operating range of 1.8V to 3.6V.
5 PB5/SWCLK/HSECLK3 bidirectional PB5 is SWCLK after reset (extra register selects SWCLK or I2C1_SDA) and can be the HSECLK3 clock input; IOMUX can remap it to PA3 or PD2.
6 PC4/AIN2 bidirectional GPIO PC4 with ADC analog input AIN2; IOMUX can remap it to PC5/HSECLK4, PC3 or PC7.
7 NRST/PA0 bidirectional NRST external reset input by default (internal pull-up, 50 kΩ typical), can be remapped to PA0 or PB4 (AF0 I2C1_SCL) through IOMUX.
8 PD5/SWDIO/AIN0 bidirectional SWDIO by default after power-on, with ADC analog input AIN0; IOMUX can remap it to PD3, PD1 or PC6.

Key specifications

Parameter Value
Manufacturer HK
Package SO-8
Category Embedded Processors & Controllers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External main supply voltage VDD-VSS -0.5 4 V includes VDDA and VDD 27
Input voltage on pin VIN -0.3 4 V min VSS-0.3, max VDD+4.0 (as printed) 27
Voltage difference between supply pins /ΔVDDx/ 50 mV 27
Voltage difference between ground pins /VSSX−VSS/ 50 mV 27
Total current through VDD/VDDA IVDD 150 mA supply current 27
Total current out of VSS IVSS 150 mA outflow current 27
Output sink current on any I/O IIO 25 mA sink 27
Output source current on any I/O IIO -25 mA source 27
Injected current on pin IINJ(PIN) -5 5 mA 27
Total injected current on all I/O and control pins ΣIINJ(PIN) -25 25 mA 27
Storage temperature range TSTG -45 150 °C 27
Maximum junction temperature TJ 125 °C 27
Internal AHB clock frequency fHCLK 0 32 MHz 28
Internal APB clock frequency fPCLK 0 32 MHz 28
Operating voltage VDD/VDDA 1.8 3.6 V VDD and VDDA merged internally 28
Operating temperature T -40 85 °C 28
Reset setup time Tdelay 40 us 28
Reset threshold VThreshold 1.75 V 28
HSI oscillator accuracy, user-calibrated ACC 1 % after user RCC_CR calibration 29
HSI oscillator accuracy, factory-calibrated ACC -1 1 % TA= -40 to 85 °C 29
HSI duty cycle DuCy 45 55 % 29
HSI oscillator startup time Tsu 1 2 us VSS≤VIN≤VDD 29
HSI oscillator power consumption IDD 80 100 uA 29
HSI clock frequency fHSI 32 MHz 29
LSI clock frequency fHSI 114 KHz 29
LSI duty cycle DuCy 45 55 % 29
LSI oscillator accuracy ACC 1.5 2.2 % factory default, TA= -40 to 85 °C 29
LSI oscillator startup time Tsu 1 2 us VSS≤VIN≤VDD 29
LSI oscillator power consumption IDD 80 100 uA 29
GPIO input clock frequency Fext 1 8 32 MHz 29
GPIO input clock duty cycle 40 60 % 29
Cycle jitter Jitter 300 ps 29
Single byte program time TPROG 6 7.5 µs 29
Page erase time TERASE 60 80 ms 29
Chip erase time TERASE 60 80 ms 29
Single byte program current IDDPROG 5 mA 29
Page/chip erase current IDDERASE 2 mA 29
Read current at 24MHz IDDREAD 2 3 mA @24MHz 29
Read current at 1MHz IDDREAD 0.25 0.4 mA @1MHz 29
Input leakage current Ilkg 3 uA VIN =3.3V 30
Weak pull-up equivalent resistor RPU 30 40 50 KΩ VIN=VSS 30
Weak pull-down equivalent resistor RPD 30 40 50 KΩ VIN=VDD 30
I/O pin capacitance CIO 5 pF 30
Input low level VIL -0.3 V max TBD 30
Maximum output frequency, mode 10 fmax(IO)out 2 MHz CL=50pF, VDD=2V to 3.6V 30
Output fall time, mode 10 tf(IO)out 125 ns CL=50pF, VDD=2V to 3.6V 30
Output rise time, mode 10 tr(IO)out 125 ns CL=50pF, VDD=2V to 3.6V 30
Maximum output frequency, mode 01 fmax(IO)out 10 MHz CL=50pF, VDD=2V to 3.6V 30
Output fall time, mode 01 tf(IO)out 25 ns CL=50pF, VDD=2V to 3.6V 30
Output rise time, mode 01 tr(IO)out 25 ns CL=50pF, VDD=2V to 3.6V 31
Maximum output frequency, mode 11 fmax(IO)out 50 MHz CL=50pF, VDD=2.7V to 3.6V 31
Output fall time, mode 11 tf(IO)out 5 ns CL=50pF, VDD=2.7V to 3.6V 31
Output rise time, mode 11 tr(IO)out 5 ns CL=50pF, VDD=2.7V to 3.6V 31
NRST low level VIL 0.8 V 31
NRST release level VIH 2 V 31
NRST Schmitt trigger hysteresis Vhys 200 mV 31
NRST internal weak pull-up Rpull 50 K 31
NRST low-level ignored (noise) TNoise 100 ns 31
Run mode current, APB clock enabled 2.599 mA VDD=3.3V, 25°C, HCLK=HSI 32MHz, Flash 1 wait cycle, APB clock enable 28
Stop mode current, LDO low-power 30.12 uA VDD=3.3V, 25°C, LDO low-power state 28
Internal reference voltage VREFINT 0.8 V -40~85°C; min/max TBD 28

CAD (KiCad official)

  • Symbol: HK32F030MJ4M6
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: hk32f030mj4m6-etched.step / hk32f030mj4m6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hk32f030mj4m6.step / hk32f030mj4m6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HK datasheet (50 pp, sha256 cbd107b3967444b1, retrieved 2026-10-24, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF