component

HK32F030MF4U6

Public Made by Adom

by adom

HK Microcontroller Units (MCUs/MPUs/SOCs), QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollerhk32f030mf4u6factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

HK32F030MF4U6

HK · Microcontroller Units (MCUs/MPUs/SOCs) · QFN-20-EP(4x4)

HK32F030MF4U6 from HK, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NRST input External reset input, active low, with internal pull-up of about 50 kΩ (VIL max 0.8 V, VIH min 2 V); default function NRST.
2 PA1/EXTCLK1 bidirectional GPIO PA1 or GPIO external clock input EXTCLK1 (1 to 32 MHz); default function PA1.
3 PA2 bidirectional GPIO PA2; default alternate function AF0 is I2C1_SMBA.
4 VSS/VSSA power_in Digital and analog ground, connected together on chip.
5 VCAP output Default function NC (floating); QFN20 does not provide the EXTCLK2 function.
6 VDD/VDDA power_in Digital and analog supply, connected together on chip, operating range 1.8 V to 3.6 V.
7 PA3 bidirectional GPIO PA3; default function PA3.
8 PB5/SWCLK/EXTCLK3 bidirectional GPIO PB5, default SWCLK debug clock, or external clock input EXTCLK3; AF0 is SWCLK or I2C1_SDA selected by an extra register.
9 PB4 bidirectional GPIO PB4; default alternate function AF0 is I2C1_SCL.
10 PC3 bidirectional GPIO PC3; default function PC3.
11 PC4/AIN2 bidirectional GPIO PC4 with ADC analog input AIN2; default function PC4.
12 PC5/EXTCLK4 bidirectional GPIO PC5 or external clock input EXTCLK4; AF0 is I2C1_SDA.
13 PC6 bidirectional GPIO PC6; default alternate function AF0 is I2C1_SCL.
14 PC7 bidirectional GPIO PC7; default function PC7.
15 PD1 bidirectional GPIO PD1; default alternate function AF0 is I2C1_SMBA.
16 PD2/AIN4 bidirectional GPIO PD2 with ADC analog input AIN4; default function PD2.
17 PD3/AIN3 bidirectional GPIO PD3 with ADC analog input AIN3; default function PD3.
18 PD4 bidirectional GPIO PD4; default alternate function AF0 is I2C1_SMBA.
19 PD5/SWDIO/AIN0 bidirectional GPIO PD5 with ADC analog input AIN0; default function SWDIO debug data (AF0 SWDIO).
20 PD6/AIN1 bidirectional GPIO PD6 with ADC analog input AIN1; default function PD6.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer HK
Package QFN-20-EP(4x4)
Category Single Chip Microcomputer/Microcontroller
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External main supply voltage (VDD-VSS) VDD-VSS -0.5 4 V includes VDDA and VDD 23
Input voltage on pin VIN 4 V min VSS - 0.3; max VDD + 4.0 23
Voltage difference between supply pins /ΔVDDx/ 50 mV 23
Voltage difference between ground pins /VSSX − VSS/ 50 mV 23
Total current into VDD/VDDA IVDD 150 mA supply current 23
Total current out of VSS IVSS 150 mA 23
Output sink current on any I/O IIO 25 mA 23
Output source current on any I/O IIO -25 mA 23
Injected current on pin IINJ(PIN) -5 5 mA 23
Total injected current on all I/O ΣIINJ(PIN) -25 25 mA 23
Storage temperature TSTG -45 150 °C 23
Maximum junction temperature TJ 125 °C 23
Internal AHB clock frequency fHCLK 0 32 MHz 24
Internal APB clock frequency fPCLK 0 32 MHz 24
Operating voltage VDD/VDDA 1.8 3.6 V 24
Operating temperature T -40 85 °C 24
Reset setup time Tdelay 40 μs 24
Reset threshold VThreshold 1.75 V 24
POR/PDR threshold, falling edge VPOR/PDR 1.8 1.88 1.96 V falling edge 24
POR/PDR threshold, rising edge VPOR/PDR 1.84 1.92 2 V rising edge 24
PDR hysteresis VPDRhyst 40 mV 24
Reset time tRSTTEMPO 1.5 2.5 4.5 ms 24
Internal reference voltage VREFINT 0.8 V -40 ~ 85°C 24
HSI clock frequency fHSI 32 MHz 25
HSI duty cycle DuCy(HSI) 45 55 % 25
HSI accuracy, factory calibrated ACC -1 1 % TA= -40 ~ +85°C, factory calibration 25
HSI startup time Tsu(HSI) 1 2 μs VSS ≤ VIN ≤ VDD 25
HSI oscillator power consumption IDD(HSI) 80 100 μA 25
LSI clock frequency fLSI 114 kHz 25
LSI duty cycle DuCy(LSI) 45 55 % 25
LSI startup time Tsu(LSI) 1 2 μs VSS ≤ VIN ≤ VDD 25
LSI oscillator power consumption IDD(LSI) 80 100 μA 25
GPIO input clock frequency Fext 1 8 32 MHz 25
GPIO input clock duty cycle 40 60 % 25
Cycle jitter Jitter 300 ps 25
Flash byte program time TPROG 30 µs 26
Flash page erase time TERASE 30 40 50 ms page erase 26
Flash chip erase time TERASE 30 40 50 ms chip erase 26
Byte program current IDDPROG 5 mA 26
Page/chip erase current IDDERASE 2 mA 26
Read current @24MHz IDDREAD 2 3 mA @24MHz 26
Read current @1MHz IDDREAD 0.25 0.4 mA @1MHz 26
Flash endurance NEND 100 千次 26
Data retention tRET 10 年 26
Schmitt trigger hysteresis Vhys 450 mV VDD = 3.3 V 26
Input leakage current Ilkg 3 μA VIN = 3.3 V 26
Pull-up resistor RPU 30 40 50 KΩ VIN = VSS 26
Pull-down resistor RPD 30 40 50 KΩ VIN = VDD 26
I/O pin capacitance CIO 5 pF 26
Output low voltage VOL 0 0.8 V VDD=3.3V IOL=-8mA 26
Output high voltage VOH 2.4 3.3 V VDD=3.3V IOH=8mA 26
Max frequency mode 10 fmax(IO)out 2 MHz CL = 50 pF, VDD = 2V ~ 3.6V 26
Fall time mode 10 tf(IO)out 125 ns 26
Rise time mode 10 tr(IO)out 125 ns 27
Max frequency mode 01 fmax(IO)out 10 MHz CL = 50 pF, VDD = 2 V ~ 3.6 V 27
Fall time mode 01 tf(IO)out 25 ns 27
Rise time mode 01 tr(IO)out 25 ns 27
Max frequency mode 11 fmax(IO)out 50 MHz CL = 50 pF, VDD = 2.7 V ~ 3.6 V 27
Fall time mode 11 tf(IO)out 5 ns CL = 50 pF, VDD = 2.7 V ~ 3.6 V 27
Rise time mode 11 tr(IO)out 5 ns CL = 50 pF, VDD = 2.7 V ~ 3.6 V 27
NRST low-level voltage VIL 0.8 V 27
NRST high-level voltage VIH 2 V 27
NRST Schmitt trigger hysteresis Vhys 200 mV 27
NRST internal weak pull-up Rpull 50 K 27
NRST low-level ignored TNoise 100 ns 27
ADC supply voltage VDD 2 3.3 3.6 V 28
ADC clock frequency fADC 0.6 14 MHz 28
Sampling frequency fS 0.05 1 MHz 28
Conversion voltage range VAIN 0 3.6 V 0 to VDD 28
External input impedance RAIN 50 kΩ 28
Sampling switch resistance RADC 1 kΩ 28
Sample and hold capacitance CADC 5 pF 28
Power-up time tSTAB 0 0 1 μs 28
Run mode current, APB clock enabled, 25°C IDD 2.599 mA VDD=3.3V, HCLK = HSI 32 MHz, 1 wait state, APB enabled, 25°C 24
Stop mode current, LDO low-power IDD 30.12 μA VDD=3.3V, 25°C, LDO 低功耗状态 25

CAD (KiCad official)

  • Symbol: HK32F030MF4U6
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: hk32f030mf4u6-etched.step / hk32f030mf4u6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hk32f030mf4u6.step / hk32f030mf4u6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HK datasheet (45 pp, sha256 468ed189f322dea3, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF