component
HGQ014N04B-G
Public Made by Adomby adom
CRMICRO MOSFETs, DFN-8(5x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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HGQ014N04B-G
CRMICRO · MOSFETs · DFN-8(5x6)
HGQ014N04B-G from CRMICRO, in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the N-channel MOSFET, shared with pins 2 and 3 (body diode continuous current IS max 100 A). |
| 2 | S | passive | Source terminal of the N-channel MOSFET, shared with pins 1 and 3 (package-limited continuous drain current 100 A). |
| 3 | S | passive | Source terminal of the N-channel MOSFET, shared with pins 1 and 2 (bond wire current limit 100 A by source bonding). |
| 4 | G | input | Gate terminal with VGS rated ±18 V and gate threshold VGS(TH) of 1.0 V min to 2.5 V max at ID=250 µA. |
| 5 | D | passive | Drain terminal, shared with pins 6-8, with VDSS of 40 V and pulsed drain current IDM of 400 A. |
| 6 | D | passive | Drain terminal, shared with pins 5, 7 and 8, with VDSS of 40 V and RDS(ON) typ 1.1 mΩ at VGS=10 V. |
| 7 | D | passive | Drain terminal, shared with pins 5, 6 and 8, with VDSS of 40 V and drain-source breakdown min 40 V at ID=250 µA. |
| 8 | D | passive | Drain terminal, shared with pins 5-7, with silicon-limited continuous drain current of 200 A at Tc=25°C. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CRMICRO |
| Package | DFN-8(5x6) |
| Category | Transistors/Thyristors |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDSS | 40 | V | 1 | |||
| Continuous Drain Current (Silicon Limited) | ID | 200 | A | Tc= 25°C(Silicon Limited) | 1 | ||
| Continuous Drain Current (Package Limited) | ID | 100 | A | Tc= 25°C(Package Limited) | 1 | ||
| Pulsed Drain Current | IDM | 400 | A | Tc= 25°C | 1 | ||
| Gate-to-Source Voltage | VGS | -18 | 18 | V | 1 | ||
| Avalanche Energy | EAS | 780 | mJ | L=0.5mH, ID=56A, Start TJ=25℃ | 1 | ||
| Power Dissipation | PD | 96 | W | TC= 25°C | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 150 | ℃ | 1 | ||
| Junction-to-Case Thermal Resistance | RθJC | 1.3 | ℃/W | 3 | |||
| Junction-to-Ambient Thermal Resistance | RθJA | 50 | ℃/W | 3 | |||
| Drain to Source Breakdown Voltage | VDSS | 40 | V | VGS=0V, ID=250µA | 2 | ||
| Drain to Source Leakage Current | IDSS | 1 | µA | VDS = 40V, VGS= 0V, Tj = 25℃ | 2 | ||
| Drain to Source Leakage Current | IDSS | 100 | µA | VDS =32V, VGS= 0V, Tj = 125℃ | 2 | ||
| Gate to Source Forward Leakage | IGSS(F) | 100 | nA | VGS=18V | 2 | ||
| Gate to Source Reverse Leakage | IGSS(R) | -100 | nA | VGS =-18V | 2 | ||
| Drain-to-Source On-Resistance | RDS(ON) | 1.1 | 1.4 | mΩ | VGS=10V,ID=19A | 2 | |
| Drain-to-Source On-Resistance | RDS(ON) | 1.8 | 2.5 | mΩ | VGS=4.5V,ID=19A | 2 | |
| Gate Threshold Voltage | VGS(TH) | 1 | 2.5 | V | VDS = VGS, ID = 250µA | 2 | |
| Gate resistance | Rg | 1.1 | Ω | VGS=0V, VDS=0V, f=1MHz | 2 | ||
| Input Capacitance | Ciss | 5131 | pF | VGS = 0V VDS =20V f = 1.0MHz | 2 | ||
| Output Capacitance | Coss | 2238 | pF | VGS = 0V VDS =20V f = 1.0MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 81 | pF | VGS = 0V VDS =20V f = 1.0MHz | 2 | ||
| Turn-on Delay Time | td(ON) | 24.8 | ns | VDD=20 V, ID= 50A, VG=10 V RG= 1.6Ω | 2 | ||
| Rise Time | tr | 11.7 | ns | VDD=20 V, ID= 50A, VG=10 V RG= 1.6Ω | 2 | ||
| Turn-Off Delay Time | td(OFF) | 70.7 | ns | VDD=20 V, ID= 50A, VG=10 V RG= 1.6Ω | 2 | ||
| Fall Time | tf | 15.6 | ns | VDD=20 V, ID= 50A, VG=10 V RG= 1.6Ω | 2 | ||
| Total Gate Charge | Qg | 93.7 | nC | VGS=10V,VDD=20V, ID=50A | 2 | ||
| Gate to Source Charge | Qgs | 14.5 | nC | VGS=10V,VDD=20V, ID=50A | 2 | ||
| Gate to Drain (Miller) Charge | Qgd | 22 | nC | VGS=10V,VDD=20V, ID=50A | 2 | ||
| Continuous Source Current (Body Diode) | IS | 100 | A | TC = 25 °C | 3 | ||
| Maximum Pulsed Current (Body Diode) | ISM | 400 | A | 3 | |||
| Diode Forward Voltage | VSD | 1.2 | V | IS=19A,VGS=0V | 3 | ||
| Reverse Recovery Time | trr | 62.1 | ns | di/dt=100A/us IF=20A | 3 | ||
| Reverse Recovery Charge | Qrr | 91 | nC | di/dt=100A/us IF=20A | 3 |
CAD (KiCad official)
- Symbol:
HGQ014N04B-G - Footprint:
Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm - 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
- 3D model files:
hgq014n04b-g-etched.step/hgq014n04b-g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hgq014n04b-g.step/hgq014n04b-g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: CRMICRO datasheet (10 pp, sha256
7f4b3d6461bb58ac, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HGQ014N04B-G
**CRMICRO** · MOSFETs · DFN-8(5x6)
HGQ014N04B-G from CRMICRO, in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the N-channel MOSFET, shared with pins 2 and 3 (body diode continuous current IS max 100 A). |
| 2 | S | passive | Source terminal of the N-channel MOSFET, shared with pins 1 and 3 (package-limited continuous drain current 100 A). |
| 3 | S | passive | Source terminal of the N-channel MOSFET, shared with pins 1 and 2 (bond wire current limit 100 A by source bonding). |
| 4 | G | input | Gate terminal with VGS rated ±18 V and gate threshold VGS(TH) of 1.0 V min to 2.5 V max at ID=250 µA. |
| 5 | D | passive | Drain terminal, shared with pins 6-8, with VDSS of 40 V and pulsed drain current IDM of 400 A. |
| 6 | D | passive | Drain terminal, shared with pins 5, 7 and 8, with VDSS of 40 V and RDS(ON) typ 1.1 mΩ at VGS=10 V. |
| 7 | D | passive | Drain terminal, shared with pins 5, 6 and 8, with VDSS of 40 V and drain-source breakdown min 40 V at ID=250 µA. |
| 8 | D | passive | Drain terminal, shared with pins 5-7, with silicon-limited continuous drain current of 200 A at Tc=25°C. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | CRMICRO |
| Package | DFN-8(5x6) |
| Category | Transistors/Thyristors |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDSS | | | 40 | V | | 1 |
| Continuous Drain Current (Silicon Limited) | ID | | | 200 | A | Tc= 25°C(Silicon Limited) | 1 |
| Continuous Drain Current (Package Limited) | ID | | | 100 | A | Tc= 25°C(Package Limited) | 1 |
| Pulsed Drain Current | IDM | | | 400 | A | Tc= 25°C | 1 |
| Gate-to-Source Voltage | VGS | -18 | | 18 | V | | 1 |
| Avalanche Energy | EAS | | | 780 | mJ | L=0.5mH, ID=56A, Start TJ=25℃ | 1 |
| Power Dissipation | PD | | | 96 | W | TC= 25°C | 1 |
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | | 150 | ℃ | | 1 |
| Junction-to-Case Thermal Resistance | RθJC | | | 1.3 | ℃/W | | 3 |
| Junction-to-Ambient Thermal Resistance | RθJA | | | 50 | ℃/W | | 3 |
| Drain to Source Breakdown Voltage | VDSS | 40 | | | V | VGS=0V, ID=250µA | 2 |
| Drain to Source Leakage Current | IDSS | | | 1 | µA | VDS = 40V, VGS= 0V, Tj = 25℃ | 2 |
| Drain to Source Leakage Current | IDSS | | | 100 | µA | VDS =32V, VGS= 0V, Tj = 125℃ | 2 |
| Gate to Source Forward Leakage | IGSS(F) | | | 100 | nA | VGS=18V | 2 |
| Gate to Source Reverse Leakage | IGSS(R) | | | -100 | nA | VGS =-18V | 2 |
| Drain-to-Source On-Resistance | RDS(ON) | | 1.1 | 1.4 | mΩ | VGS=10V,ID=19A | 2 |
| Drain-to-Source On-Resistance | RDS(ON) | | 1.8 | 2.5 | mΩ | VGS=4.5V,ID=19A | 2 |
| Gate Threshold Voltage | VGS(TH) | 1 | | 2.5 | V | VDS = VGS, ID = 250µA | 2 |
| Gate resistance | Rg | | 1.1 | | Ω | VGS=0V, VDS=0V, f=1MHz | 2 |
| Input Capacitance | Ciss | | 5131 | | pF | VGS = 0V VDS =20V f = 1.0MHz | 2 |
| Output Capacitance | Coss | | 2238 | | pF | VGS = 0V VDS =20V f = 1.0MHz | 2 |
| Reverse Transfer Capacitance | Crss | | 81 | | pF | VGS = 0V VDS =20V f = 1.0MHz | 2 |
| Turn-on Delay Time | td(ON) | | 24.8 | | ns | VDD=20 V, ID= 50A, VG=10 V RG= 1.6Ω | 2 |
| Rise Time | tr | | 11.7 | | ns | VDD=20 V, ID= 50A, VG=10 V RG= 1.6Ω | 2 |
| Turn-Off Delay Time | td(OFF) | | 70.7 | | ns | VDD=20 V, ID= 50A, VG=10 V RG= 1.6Ω | 2 |
| Fall Time | tf | | 15.6 | | ns | VDD=20 V, ID= 50A, VG=10 V RG= 1.6Ω | 2 |
| Total Gate Charge | Qg | | 93.7 | | nC | VGS=10V,VDD=20V, ID=50A | 2 |
| Gate to Source Charge | Qgs | | 14.5 | | nC | VGS=10V,VDD=20V, ID=50A | 2 |
| Gate to Drain (Miller) Charge | Qgd | | 22 | | nC | VGS=10V,VDD=20V, ID=50A | 2 |
| Continuous Source Current (Body Diode) | IS | | | 100 | A | TC = 25 °C | 3 |
| Maximum Pulsed Current (Body Diode) | ISM | | | 400 | A | | 3 |
| Diode Forward Voltage | VSD | | | 1.2 | V | IS=19A,VGS=0V | 3 |
| Reverse Recovery Time | trr | | 62.1 | | ns | di/dt=100A/us IF=20A | 3 |
| Reverse Recovery Charge | Qrr | | 91 | | nC | di/dt=100A/us IF=20A | 3 |
## CAD (KiCad official)
- Symbol: `HGQ014N04B-G`
- Footprint: `Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm`
- 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
- 3D model files: `hgq014n04b-g-etched.step` / `hgq014n04b-g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hgq014n04b-g.step` / `hgq014n04b-g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [CRMICRO datasheet](docs/hgq014n04b-g-datasheet.pdf) (10 pp, sha256 `7f4b3d6461bb58ac`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/hgq014n04b-g-datasheet.pdf)