main
Ray Publish 0.1.0 6b6b689 8d ago
{
  "slug": "hgc5615im",
  "version": "0.1.0",
  "type": "component",
  "description": "HGSEMI Digital To Analog Converters (DAC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "hgc5615im",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "hgc5615im.kicad_sym",
    "hgc5615im.kicad_mod",
    "hgc5615im.glb",
    "hgc5615im.step",
    "hgc5615im.lbr",
    "docs/hero.png",
    "docs/hgc5615im-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "hgc5615im-hero.glb",
    "hgc5615im-hero.overlay.json",
    "hgc5615im-etched.glb"
  ],
  "component": {
    "mpn": "HGC5615IM",
    "manufacturer": "HGSEMI",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8780482003509112832",
    "parts": {
      "symbol": "hgc5615im.kicad_sym",
      "footprint": "hgc5615im.kicad_mod",
      "model_3d": "hgc5615im-hero.glb",
      "model_3d_plain": "hgc5615im-etched.glb",
      "model_3d_step": "hgc5615im-etched.step",
      "model_3d_step_plain": "hgc5615im.step",
      "lbr": "hgc5615im.lbr"
    },
    "distributor_links": {
      "lcsc": "C7432071"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T18:43:52Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "DIN",
        "type": "input",
        "description": "Serial data input; the 16-bit word is clocked in most significant bit first on the rising edge of SCLK while CS is low."
      },
      {
        "number": "2",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input that shifts data into the input register on its rising edge; CS transitions should occur while SCLK is low."
      },
      {
        "number": "3",
        "name": "CS",
        "type": "input",
        "description": "Chip select, active low; data is read in while CS is low and the rising edge of CS transfers the data to the DAC register."
      },
      {
        "number": "4",
        "name": "DOUT",
        "type": "output",
        "description": "Serial data output for daisy chaining; DIN data appears at DOUT delayed by 16 clock cycles plus one clock width."
      },
      {
        "number": "5",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground; the recommended ground connection is to the system analog ground plane, with a 0.1µF ceramic bypass between VDD and AGND."
      },
      {
        "number": "6",
        "name": "REFIN",
        "type": "input",
        "description": "Reference input (buffered, high impedance) that sets the DAC full-scale output at 2 times the reference voltage; Vref range is 2V to VDD-2V."
      },
      {
        "number": "7",
        "name": "OUT",
        "type": "output",
        "description": "DAC analog voltage output, rail-to-rail buffered with short-circuit protection, which can drive a 2k load with 100pF load capacitance."
      },
      {
        "number": "8",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive power supply, 4.5V to 5.5V (5V nominal) referenced to AGND."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The CS pin name is garbled in the text extraction (rendered as 'C￾￾￾S￾'); it is recorded as CS, acti; Pin numbers and functions are identical for the DIP-8, SOP-8 and MSOP-8 variants, so the SOP-8 HGC56"
        ],
        "pages_sent": 19,
        "cost_usd": 0.0601,
        "at": "2026-10-18T18:41:36"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8780482003509112832",
        "pages": 19,
        "sha256": "4f15d178132b78e6",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "hgc5615im.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "hgc5615im-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3e861b32e706d850cbee1b311608d8a3dc69fb2113c43fbc6741225c37eb94ae",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}