component
HGA1042M-3
Public Made by Adomby adom
HGSEMI CAN Transceivers, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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HGA1042M-3
HGSEMI · CAN Transceivers · SOP-8
HGA1042M-3 from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | Transmit data input; when left floating an internal pull-up keeps the transceiver in the recessive bus state, and the dominant timeout releases the bus if TXD is held low longer than tdom_TXD (0.3 to 5 ms). |
| 2 | GND | power_in | Ground reference for the device. |
| 3 | VCC | power_in | Main supply input, rated 4.5 to 5.5 V in normal operation, with undervoltage protection that tri-states the bus outputs below the threshold (3.5 to 4.5 V). |
| 4 | RXD | output | Receive data output; it reads high in recessive bus or standby without wake request and goes low when the bus is dominant or a wake-up request is detected, and it floats when VCC is removed. |
| 5 | VIO/SPLIT | power_in | I/O level-shifting supply input (2.8 to 5.5 V operating range, supports 3.3 V MCUs on HGA1042-3) that doubles as the SPLIT common-mode regulated output at 0.5VCC in normal mode, which should be tied to the midpoint of the termination; it floats in standby mode. |
| 6 | CANL | bidirectional | Low-level CAN bus line, which is part of the differential bus driven and received by the transceiver and tolerates a bus common-mode range of -70 to 70 V. |
| 7 | CANH | bidirectional | High-level CAN bus line, which is part of the differential bus driven and received by the transceiver and tolerates a bus common-mode range of -70 to 70 V. |
| 8 | STB | input | Standby mode control input; driving it low selects normal mode, while high or floating selects standby mode, and an internal pull-up keeps the transceiver in standby when the pin is left open. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-8 |
| Category | Interface |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC 电源电流 正常模式隐性 | ICC | 2.5 | 5 | 10 | mA | 正常模式:隐性 VTXD = VIO | 5 |
| VCC 电源电流 正常模式显性 | ICC | 20 | 45 | 70 | mA | 正常模式:显性 VTXD = 0V | 5 |
| VCC 电源电流 待机模式 HGA1042-3 | ICC | 0.5 | 5 | µA | 待机模式:HGA1042-3 | 5 | |
| VIO 电源电流 正常模式隐性 | IIO | 80 | 200 | µA | 正常模式:隐性 VTXD = VIO | 5 | |
| VIO 电源电流 正常模式显性 | IIO | 350 | 1000 | µA | 正常模式:显性 VTXD = 0V | 5 | |
| VIO 电源电流 待机模式 | IIO | 12 | 17 | µA | 待机模式:VTXD = VIO | 5 | |
| VCC 欠压保护 | Vuvp_VCC | 3.5 | 4.5 | V | 5 | ||
| VIO 欠压保护 | Vuvp_VIO | 1.3 | 2 | 2.7 | V | 5 | |
| 发送数据输入 高电平输入电流 | IIH | -5 | 5 | µA | VTXD = VIO | 5 | |
| 发送数据输入 低电平输入电流 | IIL | -260 | -150 | -30 | µA | 正常模式:VTXD = 0V | 5 |
| 发送数据输入 低电平输入电压 | VIL | -0.3 | V | 5 | |||
| 待机控制输入 高电平输入电流 | IIH | -1 | 1 | µA | VSTB = VIO | 5 | |
| 待机控制输入 低电平输入电流 | IIL | -15 | -1 | µA | VSTB = 0V | 5 | |
| 待机控制输入 低电平输入电压 | VIL | -0.3 | V | 5 | |||
| 接收数据输出 高电平输出电流 | IOH | -8 | -3 | -1 | mA | 正常模式:VRXD = VIO - 0.4V | 5 |
| 接收数据输出 低电平输出电流 | IOL | 2 | 5 | 12 | mA | VRXD = 0.4V,总线显性 | 5 |
| 引脚 CANH 的显性输出电压 | VOH(D) | 2.75 | 3.5 | 4.5 | V | VTXD = 0V | 6 |
| 引脚 CANL 的显性输出电压 | VOL(D) | 0.5 | 1.5 | 2.25 | V | VTXD = 0V | 6 |
| 总线差分输出电压(显性) | VO(D) | 1.5 | 3 | V | VTXD = 0V | 6 | |
| 总线差分输出电压(隐性) | VOD(R) | -12 | 12 | mV | VTXD = VIO;隐性 45Ω<RL<65Ω | 6 | |
| 总线差分输出电压(隐性)空载 | VOD(R) | -50 | 50 | mV | VTXD = VIO;隐性空载 | 6 | |
| 显性输出电压对称性 | Vdom(TX)sym | -400 | 400 | mV | Vdom(TX)sym= VCC - VCANH -VCANL | 6 | |
| 共模输出电压 | VOC | 2 | 2.5 | 3 | V | VSTB = 0V | 6 |
| 短路输出电流(显性) | IOS | -100 | -70 | mA | VCANH = -12V,VCANL = open | 6 | |
| 短路输出电流(显性) | IOS | 0.36 | 1 | mA | VCANH = 12V,VCANL = open | 6 | |
| 短路输出电流(显性) | IOS | -1 | 0.5 | mA | VCANL = -12V,VCANH = open | 6 | |
| 短路输出电流(显性) | IOS | 70 | 100 | mA | VCANL = 12V,VCANH = open | 6 | |
| 隐性输出电流 | IO(R) | -5 | 5 | mA | 正常模式:VTXD = VIO,-27V< VCAN <32V | 6 | |
| TXD 显性超时 | tdom_TXD | 0.3 | 2 | 5 | ms | 6 | |
| BUS 显性超时 | tdom_BUS | 0.3 | 2 | 5 | ms | 6 | |
| 总线唤醒时间 | twake | 0.5 | 5 | µs | 6 | ||
| 正输入阈值 | VIT+ | 500 | 700 | 900 | mV | VSTB = 0V | 7 |
| 阈值迟滞区间 | VHYS | 50 | 120 | 200 | mV | 7 | |
| 掉电时总线输入电流 | IO(off) | -5 | 5 | µA | VCANH or VCANH = 5V, Other pin = 0V | 7 | |
| CANH、CANL 对地输入电阻 | RIN | 9 | 15 | 28 | KΩ | VTXD = VIO, VSTB = 0V | 7 |
| CANH、CANL 差分输入电阻 | RID | 19 | 30 | 52 | KΩ | 7 | |
| 输入电阻失配度 | RImatch | -1 | 1 | % | 7 | ||
| 共模电压范围 | VCOM | -30 | 30 | V | 7 | ||
| BUS 输出脚的位时间 | tbit(BUS) | 435 | 530 | ns | tbit(TXD) = 500ns | 7 | |
| BUS 输出脚的位时间 | tbit(BUS) | 155 | 210 | ns | tbit(TXD) = 200ns | 7 | |
| RXD 输出脚的位时间 | tbit(RXD) | 400 | 550 | ns | tbit(TXD) = 500ns | 7 | |
| RXD 输出脚的位时间 | tbit(RXD) | 120 | 220 | ns | tbit(TXD) = 200ns | 7 | |
| 环路延迟 1,驱动器输入到接收器输出,隐性到显性 | Td(LOOP1) | 60 | 220 | ns | VSTB = 0V | 7 | |
| 环路延迟 2,驱动器输入到接收器输出,显性到隐性 | Td(LOOP2) | 60 | 220 | ns | 7 | ||
| VCC 电源电压 可承受耐压 | VCC | -0.3 | 7 | V | 可承受耐压 | 4 | |
| VIO 电源电压 可承受耐压 | VIO | -0.3 | 7 | V | 可承受耐压 | 4 | |
| CANH、CANL 共模电压 | VCAN | -70 | 70 | V | 4 | ||
| 总线差分电压 | Vdiff | -27 | 27 | V | 4 | ||
| 静电放电电压 人体模型 | VESD | -8 | 8 | kV | 人体模型 | 4 | |
| 静电放电电压 机器模型 | VESD | -300 | 300 | V | 机器模型 | 4 | |
| 带电器件模型 角落引脚 | VESD | -750 | 750 | V | 带电器件模型,角落引脚 | 4 | |
| 带电器件模型 其他引脚 | VESD | -500 | 500 | V | 带电器件模型,其他引脚 | 4 | |
| 实际结温 | TVJ | -40 | 150 | ℃ | 4 | ||
| 存储温度 | TSTG | -55 | 150 | ℃ | 4 | ||
| 引脚温度(焊接) | TLEAD | 245 | ℃ | 焊接 10s | 4 | ||
| VCC 工作范围 | VCC | 4.5 | 5.5 | V | 工作范围 | 4 | |
| VIO 工作范围 | VIO | 2.8 | 5.5 | V | 工作范围 | 4 | |
| 热关断 关断结温 | Tj(sd) | 190 | ℃ | 7 | |||
| CANH、CANL 对地输入电容 | CIN | 20 | pF | 7 | |||
| CANH、CANL 差分输入电容 | CID | 10 | pF | 7 |
CAD (KiCad official)
- Symbol:
HGA1042M-3 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
hga1042m-3-etched.step/hga1042m-3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hga1042m-3.step/hga1042m-3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (13 pp, sha256
3f2c678c23b67c5f, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).