component
HG7330MK-1
Public Made by Adomby adom
HGSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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HG7330MK-1
HGSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89
HG7330MK-1 from HGSEMI, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the LDO. |
| 2 | VIN | power_in | Power input pin, with absolute maximum input voltage of 0 to +45 V and recommended operating input of +2.5 V to +45 V, using a 1 to 10 uF polarized capacitor placed close to the pin. |
| 3 | VOUT | power_out | Regulated output pin that must have a capacitor larger than 1 uF to ground (1 to 10 uF polarized recommended, ESR 5 to 100 mΩ), rated for output currents of 0 to 300 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOT-89 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage accuracy (TA=+25°C) | VOUT | -2 | 2 | % | TA=+25V℃ (as printed) | 4 | |
| Output voltage accuracy (-40°C to +85°C) | VOUT | -3 | 3 | % | -40℃≤TA≤+85℃ | 4 | |
| Input voltage | VIN | 45 | V | 4 | |||
| Dropout voltage (VOUT=3.0V) | VDROP | 1050 | 1350 | mV | IOUT=300mA, VOUT=3.0V | 4 | |
| Load regulation | LoadReg | 40 | mV | 1mA≤IOUT≤300mA, VIN=Vout+1V | 4 | ||
| Current limit | I_LMT | 300 | 450 | mA | VIN=VOUT+1V | 4 | |
| Quiescent current | IQ | 3 | 4 | uA | No load (IOUT=0mA) | 4 | |
| Input voltage regulation (line regulation) | 0.2 | %/V | Vo+1V≤VIN≤45V, IOUT=1mA | 4 | |||
| Input voltage (recommended) | VIN | 2.5 | 45 | V | 3 | ||
| Output current (recommended) | IOUT | 0 | 300 | mA | 3 | ||
| Operating temperature (recommended) | TA | -40 | 85 | ℃ | 3 | ||
| Input capacitor (polarized) | CIN | 1 | 10 | uF | 3 | ||
| Output capacitor (polarized) | COUT | 1 | 10 | uF | 3 | ||
| Input/output capacitor ESR | ESR | 5 | 100 | mΩ | 3 | ||
| Input voltage (absolute maximum) | Vin | 0 | 45 | V | Note1 (see electrical characteristics) | 2 | |
| Output voltage (family range) | Vout | 1.8 | 5 | V | 2 | ||
| Storage temperature | TSTG | -45 | 140 | ℃ | 2 | ||
| Operating temperature (absolute maximum) | TWK | -40 | 85 | ℃ | 2 | ||
| ESD human body model | ESDHBM | 4000 | V | Note2, human body model | 2 | ||
| ESD charged device model | CDM | 1500 | V | Note2, charged device model | 2 | ||
| Latch-up current | 200 | mA | Note2 | 2 | |||
| Thermal resistance junction-to-ambient (SOT89) | θJA | 135 | ℃/W | Ambient-connected, no airflow, no heatsink assumed, SOT89 | 3 | ||
| Power dissipation (SOT89) | PD | 0.5 | W | Measured at Ta=25℃, SOT89 | 3 |
CAD (KiCad official)
- Symbol:
HG7330MK-1 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files:
hg7330mk-1-etched.step/hg7330mk-1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hg7330mk-1.step/hg7330mk-1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (11 pp, sha256
2ccdc4399d4fd785, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HG7330MK-1
**HGSEMI** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89
HG7330MK-1 from HGSEMI, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the LDO. |
| 2 | VIN | power_in | Power input pin, with absolute maximum input voltage of 0 to +45 V and recommended operating input of +2.5 V to +45 V, using a 1 to 10 uF polarized capacitor placed close to the pin. |
| 3 | VOUT | power_out | Regulated output pin that must have a capacitor larger than 1 uF to ground (1 to 10 uF polarized recommended, ESR 5 to 100 mΩ), rated for output currents of 0 to 300 mA. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOT-89 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage accuracy (TA=+25°C) | VOUT | -2 | | 2 | % | TA=+25V℃ (as printed) | 4 |
| Output voltage accuracy (-40°C to +85°C) | VOUT | -3 | | 3 | % | -40℃≤TA≤+85℃ | 4 |
| Input voltage | VIN | | | 45 | V | | 4 |
| Dropout voltage (VOUT=3.0V) | VDROP | | 1050 | 1350 | mV | IOUT=300mA, VOUT=3.0V | 4 |
| Load regulation | LoadReg | | | 40 | mV | 1mA≤IOUT≤300mA, VIN=Vout+1V | 4 |
| Current limit | I_LMT | 300 | 450 | | mA | VIN=VOUT+1V | 4 |
| Quiescent current | IQ | | 3 | 4 | uA | No load (IOUT=0mA) | 4 |
| Input voltage regulation (line regulation) | | | | 0.2 | %/V | Vo+1V≤VIN≤45V, IOUT=1mA | 4 |
| Input voltage (recommended) | VIN | 2.5 | | 45 | V | | 3 |
| Output current (recommended) | IOUT | 0 | | 300 | mA | | 3 |
| Operating temperature (recommended) | TA | -40 | | 85 | ℃ | | 3 |
| Input capacitor (polarized) | CIN | 1 | | 10 | uF | | 3 |
| Output capacitor (polarized) | COUT | 1 | | 10 | uF | | 3 |
| Input/output capacitor ESR | ESR | 5 | | 100 | mΩ | | 3 |
| Input voltage (absolute maximum) | Vin | 0 | | 45 | V | Note1 (see electrical characteristics) | 2 |
| Output voltage (family range) | Vout | 1.8 | | 5 | V | | 2 |
| Storage temperature | TSTG | -45 | | 140 | ℃ | | 2 |
| Operating temperature (absolute maximum) | TWK | -40 | | 85 | ℃ | | 2 |
| ESD human body model | ESDHBM | | | 4000 | V | Note2, human body model | 2 |
| ESD charged device model | CDM | | | 1500 | V | Note2, charged device model | 2 |
| Latch-up current | | | | 200 | mA | Note2 | 2 |
| Thermal resistance junction-to-ambient (SOT89) | θJA | | | 135 | ℃/W | Ambient-connected, no airflow, no heatsink assumed, SOT89 | 3 |
| Power dissipation (SOT89) | PD | | | 0.5 | W | Measured at Ta=25℃, SOT89 | 3 |
## CAD (KiCad official)
- Symbol: `HG7330MK-1`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files: `hg7330mk-1-etched.step` / `hg7330mk-1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hg7330mk-1.step` / `hg7330mk-1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HGSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590230159476760576) (11 pp, sha256 `2ccdc4399d4fd785`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/hg7330mk-1-datasheet.pdf)