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HG25Q128BMW

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HGSEMI NOR FLASH, SOP-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HG25Q128BMW

HGSEMI · NOR FLASH · SOP-8-208mil

HG25Q128BMW from HGSEMI, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip Select input; serial access to the device is enabled by CS#, and the device goes to standby mode when CS# is high.
2 SO/SIO1 bidirectional Serial Data Output for 1 x I/O, or Serial Data Input & Output for 2 x I/O or 4 x I/O read mode.
3 WP#/SIO2 bidirectional Write Protection (active low) or Serial Data Input & Output for 4 x I/O read mode; has an internal pull-up when not physically connected.
4 GND power_in Ground.
5 SI/SIO0 bidirectional Serial Data Input for 1 x I/O, or Serial Data Input & Output for 2 x I/O or 4 x I/O read mode.
6 SCLK input Serial clock input.
7 RESET#/SIO3 bidirectional Hardware Reset (active low) or Serial Data Input & Output for 4 x I/O read mode; must be connected to VCC (not floating) if neither 4 x I/O nor hardware reset is used.
8 VCC power_in +3V power supply; 2.7 V to 3.6 V for read, erase and program operations.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package SOP-8-208mil
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Load Current ILI -2 2 uA VCC = VCC Max, VIN = VCC or GND 81
Output Leakage Current ILO -2 2 uA VCC = VCC Max, VOUT = VCC or GND 81
VCC Standby Current ISB1 15 100 uA VIN = VCC or GND, CS# = VCC 81
Deep Power-down Current ISB2 20 uA VIN = VCC or GND, CS# = VCC 81
VCC Read ICC1 12 25 mA f=133MHz, (4 x I/O read), SCLK=0.1VCC/0.9VCC, SO=Open 81
VCC Read ICC1 20 mA f=104MHz, (4 x I/O read), SCLK=0.1VCC/0.9VCC, SO=Open 81
VCC Read ICC1 15 mA f=84MHz, SCLK=0.1VCC/0.9VCC, SO=Open 81
VCC Program Current (PP) ICC2 12 20 mA Program in Progress, CS# = VCC 81
VCC Write Status Register (WRSR) Current ICC3 10 12 mA Program status register in progress, CS#=VCC 81
VCC Sector/Block (32K, 64K) Erase Current (SE/BE/BE32K) ICC4 10 25 mA Erase in Progress, CS#=VCC 81
VCC Chip Erase Current (CE) ICC5 14 25 mA Erase in Progress, CS#=VCC 81
Input Low Voltage VIL -0.5 0.8 V 81
Output Low Voltage VOL 0.2 V IOL = 100uA 81
Clock Frequency for all commands (except Read) fSCLK 120 MHz VCC 2.7V-3.6V 82
Clock Frequency for READ instructions fRSCLK 50 MHz READ instructions 82
Clock High Time (fSCLK > 66MHz: 45% x 1/fSCLK; <=66MHz) tCH 7 ns Others (fSCLK/fTSCLK) <= 66MHz 82
Clock High Time tCH 7 ns Normal Read (fRSCLK) 82
Clock Low Time tCL 7 ns Others (fSCLK/fTSCLK) <= 66MHz 82
Clock Rise Time (peak to peak) tCLCH 0.1 V/ns peak to peak 82
Clock Fall Time (peak to peak) tCHCL 0.1 V/ns peak to peak 82
CS# Active Setup Time (relative to SCLK) tSLCH 3 ns 82
CS# Not Active Hold Time (relative to SCLK) tCHSL 3 ns 82
Data In Setup Time tDVCH 2 ns 82
Data In Hold Time tCHDX 2 ns VCC 2.7V-3.6V 82
Data In Hold Time tCHDX 1 ns VCC 3.0V-3.6V, loading 15pF/10pF 82
CS# Active Hold Time (relative to SCLK) tCHSH 3 ns 82
CS# Not Active Setup Time (relative to SCLK) tSHCH 3 ns 82
CS# Deselect Time tSHSL 7 ns From Read to next Read 82
CS# Deselect Time tSHSL 30 ns From Write/Erase/Program to Read Status Register 82
Output Disable Time tSHQZ 8 ns 82
Clock Low to Output Valid tCLQV 8 ns VCC 2.7V-3.6V, loading 30pF 82
Clock Low to Output Valid tCLQV 6 ns VCC 3.0V-3.6V, loading 15pF 82
Clock Low to Output Valid tCLQV 5 ns VCC 3.0V-3.6V, loading 15pF, ODS(1,1) 82
Clock Low to Output Valid tCLQV 4.5 ns VCC 3.0V-3.6V, loading 10pF, ODS(0,0) 82
Output Hold Time tCLQX 1 ns Loading 30pF 83
Write Protect Setup Time tWHSL 20 ns 83
Write Protect Hold Time tSHWL 100 ns 83
CS# High to Deep Power-down Mode tDP 10 us 83
CS# High to Standby Mode without Electronic Signature Read tRES1 30 us 83
CS# High to Standby Mode with Electronic Signature Read tRES2 30 us 83
Write Status/Configuration Register Cycle Time tW 40 ms 83
Byte-Program tBP 15 30 us 83
Page Program Cycle Time tPP 0.25 0.75 ms 83
Sector Erase Cycle Time tSE 30 400 ms 83
Block Erase (32KB) Cycle Time tBE32 180 1000 ms 83
Block Erase (64KB) Cycle Time tBE 380 2000 ms 83
Chip Erase Cycle Time tCE 55 100 s 83
Program Suspend Latency tPRS 0.3 100 us Latency between Program Resume and next Suspend 83
Latency between Erase Resume and next Suspend tERS 0.3 400 us 83
Ambient Operating Temperature (Industrial grade) -40 85 °C 79
Storage Temperature -65 150 °C 79
Lead Temperature (Soldering) 245 °C 10 seconds 79
VCC to Ground Potential -0.5 4 V 79
Supply Voltage (VCC) VCC 2.7 3.6 V Read, erase and program operations 1
VCC Rise Time tVR 500000 us/V Sampled, not 100% tested 84
Input Current on all non-power pins -100 100 mA VCC = VCCmax, one pin at a time (JESD78) 88

CAD (KiCad official)

  • Symbol: HG25Q128BMW
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8-208mil (KiCad packages3D, STEP)
  • 3D model files: hg25q128bmw-etched.step / hg25q128bmw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hg25q128bmw.step / hg25q128bmw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (91 pp, sha256 b02be562f02e900c, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF