component
HG24C08M5
Public Made by Adomby adom
HGSEMI EEPROM, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 4d ago |
| viewers | 4d ago |
| hg24c08m5-etched.glb | 4d ago |
| hg24c08m5-etched.step | 4d ago |
| hg24c08m5-hero.glb | 4d ago |
| hg24c08m5-hero.overlay.json | 4d ago |
| hg24c08m5.glb | 4d ago |
| hg24c08m5.kicad_mod | 4d ago |
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| hg24c08m5.lbr | 4d ago |
| hg24c08m5.step | 4d ago |
| package.json | 4d ago |
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| README.md | 4d ago |
HG24C08M5
HGSEMI · EEPROM · SOT-23-5
HG24C08M5 from HGSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCL | input | Serial clock input that clocks data into the EEPROM on the positive edge and out of it on the negative edge. |
| 2 | GND | power_in | Ground. |
| 3 | SDA | bidirectional | Bidirectional open-drain serial data pin that may be wire-ORed with other open-drain or open-collector devices and is normally pulled high externally. |
| 4 | VCC | power_in | Power supply, 1.7V to 5.5V operating range. |
| 5 | WP | input | Write protect input: connected to GND allows normal read/write, connected to VCC write-protects the full 8K array. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOT-23-5 |
| Category | Memory |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | Vcc | 1.7 | 5.5 | V | TA = -40℃ to +85℃ | 11 | |
| DC Supply Voltage | -0.3 | 6.5 | V | Absolute maximum stress rating | 11 | ||
| Input / Output Voltage | -0.3 | V | Min printed as GND-0.3V; max printed as VCC+0.3V (not numeric) | 11 | |||
| Operating Ambient Temperature | -40 | 85 | ℃ | Absolute maximum stress rating | 11 | ||
| Storage Temperature | -65 | 150 | ℃ | Absolute maximum stress rating | 11 | ||
| Lead Temperature (Soldering) | 260 | ℃ | 10 seconds | 11 | |||
| Supply Current Read | Icc1 | 0.4 | 1 | mA | Vcc=5.0V, Read @100KHz | 11 | |
| Supply Current Write | Icc2 | 2 | 3 | mA | Vcc=5.0V, Write @100KHz | 11 | |
| Standby Current | ISB | 2 | uA | Vin=Vcc or GND | 11 | ||
| Input Leakage Current | ILI | 3 | uA | Vin=Vcc or GND | 11 | ||
| Output Leakage Current | ILO | 0.05 | 3 | uA | Vout=Vcc or GND | 11 | |
| Input Low Level | VIL | -0.6 | V | Max printed as Vcc×0.3 (not numeric) | 11 | ||
| Output Low Level Vcc=5.0V | VOL3 | 0.4 | V | Vcc=5.0V, IOL=3.0mA | 11 | ||
| Output Low Level Vcc=3.0V | VOL2 | 0.4 | V | Vcc=3.0V, IOL=2.1mA | 11 | ||
| Output Low Level Vcc=1.8V | VOL1 | 0.2 | V | Vcc=1.8V, IOL=0.15mA | 11 | ||
| Input/Output Capacitance (SDA) | CI/O | 8 | pF | VI/O = 0V; TA = 25℃, f = 1.0 MHz, VCC = +1.7V (table header) | 11 | ||
| Input Capacitance (A0, A1, A2, SCL) | CIN | 6 | pF | VIN = 0V; TA = 25℃, f = 1.0 MHz, VCC = +1.7V (table header) | 11 | ||
| Clock Frequency, SCL (1.8-volt) | fSCL | 400 | KHz | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Clock Frequency, SCL (5.0-volt) | fSCL | 1000 | KHz | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Clock Pulse Width Low (1.8-volt) | tLOW | 1.2 | us | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Clock Pulse Width Low (5.0-volt) | tLOW | 0.6 | us | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Clock Pulse Width High (1.8-volt) | tHIGH | 0.6 | us | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Clock Pulse Width High (5.0-volt) | tHIGH | 0.4 | us | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Noise Suppression Time (1.8-volt) | tI | 50 | us | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Noise Suppression Time (5.0-volt) | tI | 40 | us | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Clock Low to Data Out Valid (1.8-volt) | tAA | 0.05 | 0.9 | us | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | |
| Clock Low to Data Out Valid (5.0-volt) | tAA | 0.05 | 0.55 | us | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | |
| Bus free time before new transmission (1.8-volt) | tBUF | 1.2 | us | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Bus free time before new transmission (5.0-volt) | tBUF | 0.5 | us | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Start Hold Time (1.8-volt) | tHD.STA | 0.6 | us | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Start Hold Time (5.0-volt) | tHD.STA | 0.25 | us | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Start Setup Time (1.8-volt) | tSU.STA | 0.6 | us | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Start Setup Time (5.0-volt) | tSU.STA | 0.25 | us | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Data In Hold Time (1.8-volt) | tHD.DAT | 0 | us | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Data In Hold Time (5.0-volt) | tHD.DAT | 0 | us | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Data In Setup Time (1.8-volt) | tSU.DAT | 100 | ns | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Data In Setup Time (5.0-volt) | tSU.DAT | 100 | ns | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Inputs Rise Time (1.8-volt) | tR | 0.3 | us | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF; characterized, not 100% tested | 12 | ||
| Inputs Rise Time (5.0-volt) | tR | 0.3 | us | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF; characterized, not 100% tested | 12 | ||
| Inputs Fall Time (1.8-volt) | tF | 300 | ns | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF; characterized, not 100% tested | 12 | ||
| Inputs Fall Time (5.0-volt) | tF | 100 | ns | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF; characterized, not 100% tested | 12 | ||
| Stop Setup Time (1.8-volt) | tSU.STO | 0.6 | us | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Stop Setup Time (5.0-volt) | tSU.STO | 0.25 | us | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Data Out Hold Time (1.8-volt) | tDH | 50 | ns | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Data Out Hold Time (5.0-volt) | tDH | 50 | ns | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Write Cycle Time (1.8-volt) | tWR | 5 | ms | 1.8-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 | ||
| Write Cycle Time (5.0-volt) | tWR | 5 | ms | 5.0-volt column; TA -40 to +85℃, CL = 1 TTL Gate and 100 pF | 12 |
CAD (KiCad official)
- Symbol:
HG24C08M5 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
hg24c08m5-etched.step/hg24c08m5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hg24c08m5.step/hg24c08m5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (19 pp, sha256
228b5241d9f7dc0a, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).