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HG1302ZM
Public Made by Adomby adom
HGSEMI Real Time Clocks, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHG1302ZM
HGSEMI · Real Time Clocks · SOP-8
HG1302ZM from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC2 | power_in | Main supply pin for the dual-supply configuration; the chip runs from VCC2 when it exceeds VCC1 by more than 0.2V, and supply range is 2.0V to 5.5V. |
| 2 | X1 | passive | Connection for the 32.768kHz crystal, which connects directly to pins 2 and 3 and requires a specified load capacitance of 6pF. |
| 3 | X2 | passive | Connection for the 32.768kHz crystal, which connects directly to pins 2 and 3 and requires a specified load capacitance of 6pF. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | RST | input | Reset/enable input that must be driven high to start any data transfer; driving it low aborts the transfer and puts I/O in high impedance, and it must be logic 0 before VCC reaches 2.5V at power-up. |
| 6 | I/O | bidirectional | Serial data input/output; data is valid on the SCLK rising edge for writes and output on the falling edge for reads, and the pin goes high-impedance when RST is low. |
| 7 | SCLK | input | Serial clock input that must be logic 0 when RST is driven to logic 1. |
| 8 | VCC1 | power_in | Backup supply pin for battery backup of the clock and RAM data in dual-supply systems, with supply range 2.0V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-8 |
| Category | Clock/Timing |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 引脚对地电压 | VP | -0.5 | 7 | V | 3 | ||
| 工作温度 (HG1302Z) | TA | -40 | 85 | ℃ | HG1302Z | 3 | |
| 贮存温度 | TS | -55 | 125 | ℃ | 3 | ||
| 焊接温度 | TH | 260 | ℃ | 10 秒 | 3 | ||
| 供给电源电压 | VCC1，VCC2 | 2 | 5.5 | V | TA=0℃～70℃ | 3 | |
| 逻辑 1 输入电压 | VIH | 2 | V | 3 | |||
| 逻辑 0 输入电压 | VIL | -0.3 | 0.3 | V | VCC=2.0V | 3 | |
| 逻辑 0 输入电压 | VIL | -0.3 | 0.8 | V | VCC=5V | 3 | |
| 逻辑 1 输出电压 | VOH | 1.6 | V | VCC=2.5V | 3 | ||
| 逻辑 1 输出电压 | VOH | 2.4 | V | VCC=5V | 3 | ||
| 逻辑 0 输出电压 | VOL | 0.4 | V | VCC=2.5V | 3 | ||
| 输入电流 | ILI | 500 | μA | 3 | |||
| I/O 漏电流 | ILO | 500 | μA | 3 | |||
| 供电电流 | ICC1A | 0.4 | mA | VCC1=2.5V | 3 | ||
| 供电电流 | ICC1A | 1.2 | mA | VCC1=5V | 3 | ||
| 时间保持电流 | ICC1T | 0.3 | μA | VCC1=2.5V | 3 | ||
| 时间保持电流 | ICC1T | 1 | μA | VCC1=5V | 3 | ||
| 静态电流 | ICC1S | 100 | nA | VCC1=2.5V | 3 | ||
| 供电电流 | ICC2A | 0.425 | mA | VCC2=2.5V | 4 | ||
| 供电电流 | ICC2A | 1.28 | mA | VCC2=5V | 4 | ||
| 时间保持电流 | ICC2T | 25.3 | μA | VCC2=2.5V | 4 | ||
| 时间保持电流 | ICC2T | 81 | μA | VCC2=5V | 4 | ||
| 静态电流 | ICC2S | 25 | μA | VCC2=2.5V | 4 | ||
| 静态电流 | ICC2S | 80 | μA | VCC2=5V | 4 | ||
| 输入电容 | CI | 10 | pF | TA=25℃ | 3 | ||
| I/O 电容 | CI/O | 15 | pF | TA=25℃ | 3 | ||
| CLK 到RST 保持 | tcch | 240 | ns | VCC=2.5V | 4 | ||
| CLK 到RST 保持 | tcch | 60 | ns | VCC=5V | 4 | ||
| RST 无效 | tcwh | 4 | ns | VCC=2.5V | 4 | ||
| RST 无效 | tcwh | 1 | ns | VCC=5V | 4 | ||
| Data 到CLK 建立 | tdc | 200 | ns | VCC=2.5V | 4 | ||
| Data 到CLK 建立 | tdc | 50 | ns | VCC=5V | 4 | ||
| CLK 到Data 保持 | tcdh | 280 | ns | VCC=2.5V | 4 | ||
| CLK 到Data 保持 | tcdh | 70 | ns | VCC=5V | 4 | ||
| RST 到I/O 高阻 | tcdz | 280 | ns | VCC=2.5V | 4 | ||
| RST 到I/O 高阻 | tcdz | 70 | ns | VCC=5V | 4 | ||
| SCLK 到I/O 高阻 | tccz | 280 | ns | VCC=2.5V | 4 | ||
| SCLK 到I/O 高阻 | tccz | 70 | ns | VCC=5V | 4 | ||
| CLK 到Data 延时 | tcdd | 800 | ns | VCC=2.5V | 4 | ||
| CLK 到Data 延时 | tcdd | 200 | ns | VCC=5V | 4 | ||
| CLK 低 | tcl | 1000 | ns | VCC=2.5V | 4 | ||
| CLK 低 | tcl | 250 | ns | VCC=5V | 4 | ||
| CLK 高 | tch | 1000 | ns | VCC=2.5V | 4 | ||
| CLK 高 | tch | 250 | ns | VCC=5V | 4 | ||
| CLK 频率 | tclk | 0.5 | MHz | VCC=2.5V | 4 | ||
| CLK 频率 | tclk | 2 | MHz | VCC=5V | 4 | ||
| CLK 上升和下降 | tr，tf | 2000 | ns | VCC=2.5V | 4 | ||
| CLK 上升和下降 | tr，tf | 500 | ns | VCC=5V | 4 | ||
| RST 到CLK 建立 | tCC | 4 | µs | VCC=2.5V | 4 | ||
| RST 到CLK 建立 | tCC | 1 | µs | VCC=5V | 4 | ||
| 涓流充电电阻 | R1 | 2 | kΩ | 4 | |||
| 涓流充电电阻 | R2 | 4 | kΩ | 4 | |||
| 涓流充电电阻 | R3 | 8 | kΩ | 4 | |||
| 涓流充电二极管压降 | VTD | 0.7 | V | 4 | |||
| 晶体振荡器电容 | CX | 6 | pF | 3 |
CAD (KiCad official)
- Symbol:
HG1302ZM - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
hg1302zm-etched.step/hg1302zm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hg1302zm.step/hg1302zm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (14 pp, sha256
313dc8a655711ee6, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).