HEF4094BT

{
  "schema_version": 1,
  "type": "component",
  "slug": "hef4094bt",
  "title": "HEF4094BT",
  "brief": "Nexperia Shifting Register, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "hef4094bt"
  ],
  "component": {
    "mpn": "HEF4094BT",
    "manufacturer": "Nexperia",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Shifting Register",
    "datasheet": "https://assets.nexperia.com/documents/data-sheet/HEF4094BT.pdf",
    "parts": {
      "symbol": "hef4094bt.kicad_sym",
      "footprint": "hef4094bt.kicad_mod",
      "model_3d": "hef4094bt-etched.glb",
      "model_3d_plain": "hef4094bt.glb",
      "model_3d_step": "hef4094bt-etched.step",
      "model_3d_step_plain": "hef4094bt.step",
      "lbr": "hef4094bt.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "STR",
        "type": "input",
        "description": "Strobe input. When HIGH, data in the 8-bit shift register is transferred into the 8-bit storage register that drives the QP0-QP7 parallel outputs."
      },
      {
        "number": "2",
        "name": "D",
        "type": "input",
        "description": "Serial data input. Sampled on the LOW-to-HIGH transition of CP and shifted into the first stage of the shift register."
      },
      {
        "number": "3",
        "name": "CP",
        "type": "input",
        "description": "Clock input for the 8-stage shift register. Data on D is shifted on the LOW-to-HIGH (positive) transition of CP."
      },
      {
        "number": "4",
        "name": "QP0",
        "type": "tri_state",
        "description": "Parallel output bit 0 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."
      },
      {
        "number": "5",
        "name": "QP1",
        "type": "tri_state",
        "description": "Parallel output bit 1 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."
      },
      {
        "number": "6",
        "name": "QP2",
        "type": "tri_state",
        "description": "Parallel output bit 2 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."
      },
      {
        "number": "7",
        "name": "QP3",
        "type": "tri_state",
        "description": "Parallel output bit 3 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground supply voltage (0 V reference). All input/output voltages are referenced to VSS."
      },
      {
        "number": "9",
        "name": "QS1",
        "type": "output",
        "description": "Serial output for cascading. Data appears at QS1 on the LOW-to-HIGH transition of CP (allows cascading when clock edges are fast)."
      },
      {
        "number": "10",
        "name": "QS2",
        "type": "output",
        "description": "Serial output for cascading. Data appears at QS2 on the next HIGH-to-LOW transition of CP (allows cascading when clock edges are slow)."
      },
      {
        "number": "11",
        "name": "QP7",
        "type": "tri_state",
        "description": "Parallel output bit 7 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."
      },
      {
        "number": "12",
        "name": "QP6",
        "type": "tri_state",
        "description": "Parallel output bit 6 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."
      },
      {
        "number": "13",
        "name": "QP5",
        "type": "tri_state",
        "description": "Parallel output bit 5 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."
      },
      {
        "number": "14",
        "name": "QP4",
        "type": "tri_state",
        "description": "Parallel output bit 4 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW."
      },
      {
        "number": "15",
        "name": "OE",
        "type": "input",
        "description": "Output enable input. HIGH enables the QP0-QP7 parallel outputs; LOW places them in a high-impedance OFF-state. Does not affect the state of the shift or storage registers."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply voltage. Recommended operating range 3 V to 15 V; absolute max 18 V referenced to VSS."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://assets.nexperia.com/documents/data-sheet/HEF4094BT.pdf",
        "pages": 15,
        "sha256": "0020655a9e8cad90",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -4.445
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "CD4094",
      "logic_family": "CD4000",
      "function_code": "4094",
      "function_class": "ShiftRegister",
      "function_name": "8-Bit SIPO Shift Register with Output Latch",
      "manufacturer": "NXP (legacy Philips)",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "hef4094bt.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "hef4094bt-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b5f769c808af4be6f2eafce4e08830b539fe7379485b870300ea207bb11e8d4",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Nexperia",
      "Package": "SOIC-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "hef4094bt"
  ],
  "discovery_pitch": "HEF4094BT (Nexperia) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "hef4094bt.kicad_sym",
    "hef4094bt.kicad_mod",
    "hef4094bt.glb",
    "hef4094bt.step",
    "hef4094bt-etched.step",
    "hef4094bt.lbr",
    "docs/hero.png",
    "docs/hef4094bt-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "HEF4094BTT",
      "kind": "packaging"
    },
    {
      "mpn": "HEF4094BTTT",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-24T21:43:19.519Z"
}