component
HEF4094BT
Public Made by Adomby adom
Nexperia Shifting Register, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
215ee5e
2mo ago
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{
"schema": "adom.pads/1",
"slug": "hef4094bt",
"footprint": "SOIC-16_3.9x9.9mm_P1.27mm",
"generated_from": {
"footprint": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
"pins": "page.json:component.pins",
"overrides": null
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-4.445
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c"
},
"pad_count": 16,
"symbol_pins": [
"1",
"10",
"11",
"12",
"13",
"14",
"15",
"16",
"2",
"3",
"4",
"5",
"6",
"7",
"8",
"9"
],
"paste_apertures": 0,
"issues": [],
"pads": [
{
"pad": "1",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-4.445
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "1",
"name": "STR",
"type": "input",
"description": "Strobe input. When HIGH, data in the 8-bit shift register is transferred into the 8-bit storage register that drives the QP0-QP7 parallel outputs.",
"is_pin1": true,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "2",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-3.175
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "2",
"name": "D",
"type": "input",
"description": "Serial data input. Sampled on the LOW-to-HIGH transition of CP and shifted into the first stage of the shift register.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "3",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "3",
"name": "CP",
"type": "input",
"description": "Clock input for the 8-stage shift register. Data on D is shifted on the LOW-to-HIGH (positive) transition of CP.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "4",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "4",
"name": "QP0",
"type": "tri_state",
"description": "Parallel output bit 0 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "5",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "5",
"name": "QP1",
"type": "tri_state",
"description": "Parallel output bit 1 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "6",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "6",
"name": "QP2",
"type": "tri_state",
"description": "Parallel output bit 2 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "7",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
3.175
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "7",
"name": "QP3",
"type": "tri_state",
"description": "Parallel output bit 3 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "8",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
4.445
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "8",
"name": "VSS",
"type": "power_in",
"description": "Ground supply voltage (0 V reference). All input/output voltages are referenced to VSS.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "9",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
4.445
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "9",
"name": "QS1",
"type": "output",
"description": "Serial output for cascading. Data appears at QS1 on the LOW-to-HIGH transition of CP (allows cascading when clock edges are fast).",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "10",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
3.175
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "10",
"name": "QS2",
"type": "output",
"description": "Serial output for cascading. Data appears at QS2 on the next HIGH-to-LOW transition of CP (allows cascading when clock edges are slow).",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "11",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "11",
"name": "QP7",
"type": "tri_state",
"description": "Parallel output bit 7 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "12",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "12",
"name": "QP6",
"type": "tri_state",
"description": "Parallel output bit 6 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "13",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "13",
"name": "QP5",
"type": "tri_state",
"description": "Parallel output bit 5 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "14",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "14",
"name": "QP4",
"type": "tri_state",
"description": "Parallel output bit 4 from the storage register. 3-state: driven when OE is HIGH, high-impedance when OE is LOW.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "15",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-3.175
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "15",
"name": "OE",
"type": "input",
"description": "Output enable input. HIGH enables the QP0-QP7 parallel outputs; LOW places them in a high-impedance OFF-state. Does not affect the state of the shift or storage registers.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "16",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-4.445
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "16",
"name": "VDD",
"type": "power_in",
"description": "Positive supply voltage. Recommended operating range 3 V to 15 V; absolute max 18 V referenced to VSS.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
}
]
}