main
Ray hef4069ubt: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) a57ca2e
{
  "schema_version": 1,
  "type": "component",
  "slug": "hef4069ubt",
  "title": "HEF4069UBT",
  "brief": "Nexperia Inverters, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "hef4069ubt"
  ],
  "component": {
    "mpn": "HEF4069UBT",
    "manufacturer": "Nexperia",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Inverters",
    "datasheet": "https://assets.nexperia.com/documents/data-sheet/HEF4069UBT.pdf",
    "parts": {
      "symbol": "hef4069ubt.kicad_sym",
      "footprint": "hef4069ubt.kicad_mod",
      "model_3d": "hef4069ubt-etched.glb",
      "model_3d_plain": "hef4069ubt.glb",
      "model_3d_step": "hef4069ubt-etched.step",
      "model_3d_step_plain": "hef4069ubt.step",
      "lbr": "hef4069ubt.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "Inverter 1 input. CMOS logic input with internal clamp diodes to VSS and VDD; input voltage range 0 V to VDD, with clamping currents limited to ±10 mA. Input capacitance approximately 7.5 pF."
      },
      {
        "number": "2",
        "name": "1Y",
        "type": "output",
        "description": "Inverter 1 output. CMOS push-pull output; drives complementary logic level of 1A. VOH ≥ VDD-0.05 V and VOL ≤ 0.05 V at |IO| < 1 µA."
      },
      {
        "number": "3",
        "name": "2A",
        "type": "input",
        "description": "Inverter 2 input. CMOS logic input with input clamp diodes to VSS and VDD; input leakage typ ±0.1 µA at VDD = 15 V."
      },
      {
        "number": "4",
        "name": "2Y",
        "type": "output",
        "description": "Inverter 2 output. CMOS push-pull output; complementary logic level of 2A."
      },
      {
        "number": "5",
        "name": "3A",
        "type": "input",
        "description": "Inverter 3 input. CMOS logic input with internal clamp diodes; input voltage range 0 V to VDD."
      },
      {
        "number": "6",
        "name": "3Y",
        "type": "output",
        "description": "Inverter 3 output. CMOS push-pull output; complementary logic level of 3A."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference (0 V). Common return for logic and supply currents."
      },
      {
        "number": "8",
        "name": "4Y",
        "type": "output",
        "description": "Inverter 4 output. CMOS push-pull output; complementary logic level of 4A."
      },
      {
        "number": "9",
        "name": "4A",
        "type": "input",
        "description": "Inverter 4 input. CMOS logic input with clamp diodes to VSS and VDD."
      },
      {
        "number": "10",
        "name": "5Y",
        "type": "output",
        "description": "Inverter 5 output. CMOS push-pull output; complementary logic level of 5A."
      },
      {
        "number": "11",
        "name": "5A",
        "type": "input",
        "description": "Inverter 5 input. CMOS logic input with clamp diodes to VSS and VDD."
      },
      {
        "number": "12",
        "name": "6Y",
        "type": "output",
        "description": "Inverter 6 output. CMOS push-pull output; complementary logic level of 6A."
      },
      {
        "number": "13",
        "name": "6A",
        "type": "input",
        "description": "Inverter 6 input. CMOS logic input with clamp diodes to VSS and VDD."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply voltage. Recommended operating range 3.0 V to 15.0 V (absolute max 18 V); supply current typ 0.25 µA to 1.0 µA static, 50 mA absolute max. Decouple to VSS with a local ceramic capacitor."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://assets.nexperia.com/documents/data-sheet/HEF4069UBT.pdf",
        "pages": 13,
        "sha256": "479940d50b7b564a",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -3.81
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "CD4069",
      "logic_family": "CD4000",
      "function_code": "4069",
      "function_class": "Gate",
      "function_name": "Hex Inverter",
      "manufacturer": "NXP (legacy Philips)",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "hef4069ubt.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "hef4069ubt-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "dc3d55cfb03ddbf2642901d181ab576f9c028c11cb48cd7e4d996da92c05101e",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Nexperia",
      "Package": "SOIC-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "hef4069ubt"
  ],
  "discovery_pitch": "HEF4069UBT (Nexperia) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "hef4069ubt.kicad_sym",
    "hef4069ubt.kicad_mod",
    "hef4069ubt.glb",
    "hef4069ubt.step",
    "hef4069ubt-etched.step",
    "hef4069ubt.lbr",
    "docs/hero.png",
    "docs/hef4069ubt-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "HEF4069UBTT",
      "kind": "packaging"
    },
    {
      "mpn": "HEF4069UBTTT",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-24T21:42:47.168Z"
}