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HEF4043BT

Public Made by Adom

by adom

Nexperia Latches, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HEF4043BT

Nexperia · Latches · SO-16

HEF4043BT from Nexperia, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 4Q tri_state 3-state buffered latch output for latch 4, high impedance when OE is LOW.
2 1Q tri_state 3-state buffered latch output for latch 1, high impedance when OE is LOW.
3 1R input Reset input for latch 1, active HIGH.
4 1S input Set input for latch 1, active HIGH.
5 OE input Common output enable input; when LOW the latch outputs are in the high impedance OFF-state without affecting latch state.
6 2S input Set input for latch 2, active HIGH.
7 2R input Reset input for latch 2, active HIGH.
8 VSS power_in Ground supply voltage (0 V).
9 2Q tri_state 3-state buffered latch output for latch 2, high impedance when OE is LOW.
10 3Q tri_state 3-state buffered latch output for latch 3, high impedance when OE is LOW.
11 3R input Reset input for latch 3, active HIGH.
12 3S input Set input for latch 3, active HIGH.
13 n.c. unconnected Not connected.
14 4S input Set input for latch 4, active HIGH.
15 4R input Reset input for latch 4, active HIGH.
16 VDD power_in Supply voltage, recommended 3 V to 15 V (absolute maximum +18 V).

Key specifications

Parameter Value
Manufacturer Nexperia
Package SO-16
Category Logic ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD -0.5 18 V 3
Input clamping current IIK -10 10 mA VI < -0.5 V or VI > VDD + 0.5 V 3
Output clamping current IOK -10 10 mA VO < -0.5 V or VO > VDD + 0.5 V 3
Input/output current II/O -10 10 mA 3
Supply current IDD 50 mA 3
Storage temperature Tstg -65 150 °C 3
Ambient temperature Tamb -40 85 °C 3
Total power dissipation Ptot 500 mW Tamb -40 °C to +85 °C 3
Power dissipation per output P 100 mW 3
Supply voltage VDD 3 15 V 4
Input voltage VI 0 15 V 0 to VDD 4
Ambient temperature Tamb -40 85 °C in free air 4
Input transition rise and fall rate Δt/ΔV 3.75 μs/V VDD = 5 V 4
Input transition rise and fall rate Δt/ΔV 0.5 μs/V VDD = 10 V 4
Input transition rise and fall rate Δt/ΔV 0.08 μs/V VDD = 15 V 4
HIGH-level input voltage VIH 3.5 V /IO/ < 1 μA; VDD = 5 V; Tamb = -40/+25/+85 °C 4
HIGH-level input voltage VIH 7 V /IO/ < 1 μA; VDD = 10 V; Tamb = -40/+25/+85 °C 4
HIGH-level input voltage VIH 11 V /IO/ < 1 μA; VDD = 15 V; Tamb = -40/+25/+85 °C 4
LOW-level input voltage VIL 1.5 V /IO/ < 1 μA; VDD = 5 V; Tamb = -40/+25/+85 °C 4
LOW-level input voltage VIL 3 V /IO/ < 1 μA; VDD = 10 V; Tamb = -40/+25/+85 °C 4
LOW-level input voltage VIL 4 V /IO/ < 1 μA; VDD = 15 V; Tamb = -40/+25/+85 °C 4
HIGH-level output voltage VOH 4.95 V /IO/ < 1 μA; VDD = 5 V; Tamb = -40/+25/+85 °C 4
HIGH-level output voltage VOH 9.95 V /IO/ < 1 μA; VDD = 10 V; Tamb = -40/+25/+85 °C 4
HIGH-level output voltage VOH 14.95 V /IO/ < 1 μA; VDD = 15 V; Tamb = -40/+25/+85 °C 4
LOW-level output voltage VOL 0.05 V /IO/ < 1 μA; VDD = 5/10/15 V; Tamb = -40/+25/+85 °C 4
HIGH-level output current IOH -1.4 mA VO = 2.5 V; VDD = 5 V; Tamb = +25 °C 4
HIGH-level output current IOH -0.44 mA VO = 4.6 V; VDD = 5 V; Tamb = +25 °C 4
HIGH-level output current IOH -1.1 mA VO = 9.5 V; VDD = 10 V; Tamb = +25 °C 4
HIGH-level output current IOH -3 mA VO = 13.5 V; VDD = 15 V; Tamb = +25 °C 4
LOW-level output current IOL 0.44 mA VO = 0.4 V; VDD = 5 V; Tamb = +25 °C 4
LOW-level output current IOL 1.1 mA VO = 0.5 V; VDD = 10 V; Tamb = +25 °C 4
LOW-level output current IOL 3 mA VO = 1.5 V; VDD = 15 V; Tamb = +25 °C 4
Input leakage current II -0.3 0.3 μA VDD = 15 V; Tamb = -40 °C and +25 °C 4
Input leakage current II -1 1 μA VDD = 15 V; Tamb = +85 °C 4
OFF-state output current IOZ 1.6 μA nQ output HIGH, returned to VDD; VDD = 15 V; Tamb = +25 °C 4
OFF-state output current IOZ 12 μA nQ output HIGH, returned to VDD; VDD = 15 V; Tamb = +85 °C 4
Supply current IDD 20 μA IO = 0 A; VDD = 5 V; Tamb = +25 °C 4
Supply current IDD 40 μA IO = 0 A; VDD = 10 V; Tamb = +25 °C 4
Supply current IDD 80 μA IO = 0 A; VDD = 15 V; Tamb = +25 °C 4
Supply current IDD 150 μA IO = 0 A; VDD = 5 V; Tamb = +85 °C 4
Supply current IDD 300 μA IO = 0 A; VDD = 10 V; Tamb = +85 °C 4
Supply current IDD 600 μA IO = 0 A; VDD = 15 V; Tamb = +85 °C 4
HIGH to LOW propagation delay nR to nQ tPHL 90 180 ns VDD = 5 V; Tamb = 25 °C 5
HIGH to LOW propagation delay nR to nQ tPHL 35 70 ns VDD = 10 V; Tamb = 25 °C 5
HIGH to LOW propagation delay nR to nQ tPHL 25 50 ns VDD = 15 V; Tamb = 25 °C 5
LOW to HIGH propagation delay nS to nQ tPLH 65 135 ns VDD = 5 V; Tamb = 25 °C 5
LOW to HIGH propagation delay nS to nQ tPLH 25 50 ns VDD = 10 V; Tamb = 25 °C 5
LOW to HIGH propagation delay nS to nQ tPLH 15 35 ns VDD = 15 V; Tamb = 25 °C 5
Transition time tt 60 120 ns nQ output; VDD = 5 V; Tamb = 25 °C 5
Transition time tt 30 60 ns nQ output; VDD = 10 V; Tamb = 25 °C 5
Transition time tt 20 40 ns nQ output; VDD = 15 V; Tamb = 25 °C 5
HIGH to OFF-state propagation delay tPHZ 45 90 ns OE to nQ; VDD = 5 V; Tamb = 25 °C 5
LOW to OFF-state propagation delay tPLZ 50 100 ns OE to nQ; VDD = 5 V; Tamb = 25 °C 5
OFF-state to HIGH propagation delay tPZH 25 50 ns OE to nQ; VDD = 5 V; Tamb = 25 °C 5
OFF-state to LOW propagation delay tPZL 40 80 ns OE to nQ; VDD = 5 V; Tamb = 25 °C 5
Pulse width nS input HIGH tW 30 15 ns VDD = 5 V; Tamb = 25 °C 5
Pulse width nS input HIGH tW 20 10 ns VDD = 10 V; Tamb = 25 °C 5
Pulse width nS input HIGH tW 16 8 ns VDD = 15 V; Tamb = 25 °C 5
Pulse width nR input HIGH tW 30 15 ns VDD = 5 V; Tamb = 25 °C 5
Pulse width nR input HIGH tW 20 10 ns VDD = 10 V; Tamb = 25 °C 5
Input capacitance CI 7.5 pF 4

CAD (KiCad official)

  • Symbol: HEF4043BT
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SO-16 (KiCad packages3D, STEP)
  • 3D model files: hef4043bt-etched.step / hef4043bt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hef4043bt.step / hef4043bt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (11 pp, sha256 1a6011f97d58eba6, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF