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HEF4015BT

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Nexperia Shift Registers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HEF4015BT

Nexperia · Shift Registers · SOIC-16

HEF4015BT from Nexperia, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 2CP input Clock input for shift register 2, LOW-to-HIGH edge-triggered; data shifts one position on each LOW-to-HIGH transition.
2 2Q3 output Fully buffered parallel output Q3 of shift register 2.
3 1Q2 output Fully buffered parallel output Q2 of shift register 1.
4 1Q1 output Fully buffered parallel output Q1 of shift register 1.
5 1Q0 output Fully buffered parallel output Q0 of shift register 1; forced LOW when 1MR is HIGH.
6 1MR input Master reset input for shift register 1, active HIGH; a HIGH clears the register and forces Q0 to Q3 LOW independent of CP and D.
7 1D input Serial data input for shift register 1; the data present is shifted into the first register position on the LOW-to-HIGH transition of 1CP.
8 VSS power_in Ground supply voltage (0 V reference).
9 1CP input Clock input for shift register 1, LOW-to-HIGH edge-triggered.
10 1Q3 output Fully buffered parallel output Q3 of shift register 1.
11 2Q2 output Fully buffered parallel output Q2 of shift register 2.
12 2Q1 output Fully buffered parallel output Q1 of shift register 2.
13 2Q0 output Fully buffered parallel output Q0 of shift register 2; forced LOW when 2MR is HIGH.
14 2MR input Master reset input for shift register 2, active HIGH; a HIGH clears the register and forces Q0 to Q3 LOW independent of CP and D.
15 2D input Serial data input for shift register 2; the data present is shifted into the first register position on the LOW-to-HIGH transition of 2CP.
16 VDD power_in Supply voltage, recommended range 3 V to 15 V (absolute maximum 18 V).

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOIC-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD supply voltage (absolute maximum) VDD -0.5 18 V 3
input clamping current IIK -10 10 mA VI < -0.5 V or VI > VDD + 0.5 V 3
input voltage (absolute maximum) VI -0.5 V 3
output clamping current IOK -10 10 mA VO < -0.5 V or VO > VDD + 0.5 V 3
input/output current II/O -10 10 mA 3
supply current (absolute maximum) IDD 50 mA 3
storage temperature Tstg -65 150 °C 3
total power dissipation Ptot 500 mW Tamb = -40 °C to +85 °C 3
supply voltage (recommended) VDD 3 15 V 4
input voltage (recommended) VI 0 V 4
ambient temperature (recommended) Tamb -40 85 °C in free air 4
input transition rise and fall rate Δt/ΔV 3.75 μs/V VDD = 5 V 4
input transition rise and fall rate Δt/ΔV 0.5 μs/V VDD = 10 V 4
input transition rise and fall rate Δt/ΔV 0.08 μs/V VDD = 15 V 4
HIGH-level input voltage VIH 3.5 V VDD = 5 V; /IO/ < 1 μA; Tamb = -40, 25, 85 °C (same limit) 4
HIGH-level input voltage VIH 7 V VDD = 10 V; /IO/ < 1 μA; Tamb = -40, 25, 85 °C (same limit) 4
HIGH-level input voltage VIH 11 V VDD = 15 V; /IO/ < 1 μA; Tamb = -40, 25, 85 °C (same limit) 4
LOW-level input voltage VIL 1.5 V VDD = 5 V; /IO/ < 1 μA; Tamb = -40, 25, 85 °C (same limit) 4
LOW-level input voltage VIL 3 V VDD = 10 V; /IO/ < 1 μA; Tamb = -40, 25, 85 °C (same limit) 4
LOW-level input voltage VIL 4 V VDD = 15 V; /IO/ < 1 μA; Tamb = -40, 25, 85 °C (same limit) 4
HIGH-level output voltage VOH 4.95 V VDD = 5 V; /IO/ < 1 μA; Tamb = -40, 25, 85 °C (same limit) 4
HIGH-level output voltage VOH 9.95 V VDD = 10 V; /IO/ < 1 μA; Tamb = -40, 25, 85 °C (same limit) 4
HIGH-level output voltage VOH 14.95 V VDD = 15 V; /IO/ < 1 μA; Tamb = -40, 25, 85 °C (same limit) 4
LOW-level output voltage VOL 0.05 V VDD = 5 V; /IO/ < 1 μA; Tamb = -40, 25, 85 °C (same limit) 4
HIGH-level output current IOH -1.7 mA VO = 2.5 V; VDD = 5 V; Tamb = -40 °C 4
HIGH-level output current IOH -1.4 mA VO = 2.5 V; VDD = 5 V; Tamb = 25 °C 4
HIGH-level output current IOH -1.1 mA VO = 2.5 V; VDD = 5 V; Tamb = 85 °C 4
HIGH-level output current IOH -0.52 mA VO = 4.6 V; VDD = 5 V; Tamb = -40 °C 4
HIGH-level output current IOH -0.44 mA VO = 4.6 V; VDD = 5 V; Tamb = 25 °C 4
HIGH-level output current IOH -0.36 mA VO = 4.6 V; VDD = 5 V; Tamb = 85 °C 4
HIGH-level output current IOH -1.3 mA VO = 9.5 V; VDD = 10 V; Tamb = -40 °C 4
HIGH-level output current IOH -0.9 mA VO = 9.5 V; VDD = 10 V; Tamb = 85 °C 4
HIGH-level output current IOH -3.6 mA VO = 13.5 V; VDD = 15 V; Tamb = -40 °C 4
HIGH-level output current IOH -3 mA VO = 13.5 V; VDD = 15 V; Tamb = 25 °C 4
HIGH-level output current IOH -2.4 mA VO = 13.5 V; VDD = 15 V; Tamb = 85 °C 4
LOW-level output current IOL 0.52 mA VO = 0.4 V; VDD = 5 V; Tamb = -40 °C 4
LOW-level output current IOL 0.44 mA VO = 0.4 V; VDD = 5 V; Tamb = 25 °C 4
LOW-level output current IOL 0.36 mA VO = 0.4 V; VDD = 5 V; Tamb = 85 °C 4
LOW-level output current IOL 1.3 mA VO = 0.5 V; VDD = 10 V; Tamb = -40 °C 4
LOW-level output current IOL 1.1 mA VO = 0.5 V; VDD = 10 V; Tamb = 25 °C 4
LOW-level output current IOL 0.9 mA VO = 0.5 V; VDD = 10 V; Tamb = 85 °C 4
LOW-level output current IOL 3.6 mA VO = 1.5 V; VDD = 15 V; Tamb = -40 °C 4
LOW-level output current IOL 3 mA VO = 1.5 V; VDD = 15 V; Tamb = 25 °C 4
LOW-level output current IOL 2.4 mA VO = 1.5 V; VDD = 15 V; Tamb = 85 °C 4
input leakage current II -0.3 0.3 μA VDD = 15 V; Tamb = -40 °C 4
input leakage current II -1 1 μA VDD = 15 V; Tamb = 85 °C 4
supply current IDD 20 μA IO = 0 A; VDD = 5 V; Tamb = -40 °C 4
supply current IDD 150 μA IO = 0 A; VDD = 5 V; Tamb = 85 °C 4
supply current IDD 40 μA IO = 0 A; VDD = 10 V; Tamb = -40 °C 4
supply current IDD 300 μA IO = 0 A; VDD = 10 V; Tamb = 85 °C 4
supply current IDD 80 μA IO = 0 A; VDD = 15 V; Tamb = -40 °C 4
supply current IDD 600 μA IO = 0 A; VDD = 15 V; Tamb = 85 °C 4
input capacitance CI 7.5 pF 4

CAD (KiCad official)

  • Symbol: HEF4015BT
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: hef4015bt-etched.step / hef4015bt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hef4015bt.step / hef4015bt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (11 pp, sha256 ab9470f320e36a7c, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF