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HD622A

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Broadic RS-485 / RS-422 ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HD622A

Broadic · RS-485 / RS-422 ICs · SOP-8

HD622A from Broadic, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VB power_in Bus voltage input pin, which the datasheet rates for a receive high-level bus voltage of 18 V to 45 V.
2 RIDD passive Bus current setting pin where an external RRIDD resistor sets the bus static current, with the datasheet recommending 20 kΩ to 200 kΩ and giving VRIDD of 5.9 V typical at 50 kΩ.
3 SC passive Receive demodulation capacitor pin, where the datasheet specifies Csc = 1 µF and SC voltage of 3.7 V to 4.0 V (3.85 V typical).
4 STC power_out 5 V regulator output pin, where the datasheet specifies Cstc = 10 µF and STC voltage of 5.0 V to 5.5 V (5.2 V typical), with up to 30 mA of drive current available.
5 TX output Data output pin, which the datasheet specifies with a high level of 3.2 V to 3.4 V and a low level of 0 V to 0.3 V, with a default 3.3 V logic level.
6 VDD power_out 3.3 V regulator output pin, where the datasheet specifies Cvdd = 1 µF and VDD voltage of 3.2 V to 3.4 V (3.3 V typical), with up to 30 mA of drive current shared with STC.
7 RX input Data input pin, which the datasheet rates for an input high level of 2 V to 5 V, an input low level of 0 V to 1.6 V, and an input voltage range of 0 V to 5.5 V (absolute maximum -0.3 V to 5.5 V).
8 GND power_in Ground pin, to which all voltages in the datasheet are referenced unless otherwise stated.

Key specifications

Parameter Value
Manufacturer Broadic
Package SOP-8
Category Interface
Pins 8

CAD (KiCad official)

  • Symbol: HD622A
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: hd622a-etched.step / hd622a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hd622a.step / hd622a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Broadic datasheet (8 pp, sha256 69f9817bac2c8542, retrieved 2026-10-09, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF