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HCT6961-8

HCTmicro · Analog To Digital Converters (ADC) · QFN-32-EP(5x5)

HCT6961-8 from HCTmicro, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection; leave the pin unconnected.
2 DVDD power_in Digital supply, with a ceramic capacitor greater than 0.1uF between DVDD and DVSS; DVDD must equal the external MCU supply voltage, though it may differ from AVDD.
3 DVSS power_in Digital ground.
4 AIN0/IOUT/VB bidirectional ADC analog input channel AIN0, which can alternatively be the IDAC current source output (IOUT) or the bias voltage output (VB, (AVDD-AVSS)/2 with 5mA drive capability).
5 AIN1/IOUT/VB bidirectional ADC analog input channel AIN1, which can alternatively be the IDAC current source output (IOUT) or the bias voltage output (VB, (AVDD-AVSS)/2 with 5mA drive capability).
6 AIN2/IOUT/VB/P1 bidirectional ADC analog input channel AIN2, alternatively IOUT or VB, and also general-purpose I/O P1 when enabled in SYS_CONF4; a pin used as GPIO cannot be used as an ADC input.
7 AIN3/IOUT/VB/P2 bidirectional ADC analog input channel AIN3, alternatively IOUT or VB, and also general-purpose I/O P2 when enabled in SYS_CONF4; a pin used as GPIO cannot be used as an ADC input.
8 AIN4/IOUT/VB/P3 bidirectional ADC analog input channel AIN4, alternatively IOUT or VB, and also general-purpose I/O P3 when enabled in SYS_CONF4; a pin used as GPIO cannot be used as an ADC input.
9 AIN5/IOUT/VB/P4 bidirectional ADC analog input channel AIN5, alternatively IOUT or VB, and also general-purpose I/O P4 when enabled in SYS_CONF4; a pin used as GPIO cannot be used as an ADC input.
10 AIN6/IOUT/VB bidirectional ADC analog input channel AIN6, which can alternatively be the IDAC current source output (IOUT) or the bias voltage output (VB).
11 AIN7/IOUT/VB bidirectional ADC analog input channel AIN7, which can alternatively be the IDAC current source output (IOUT) or the bias voltage output (VB).
12 REFP1 bidirectional Positive input of reference voltage source 1; a capacitor of at least 1uF must be connected between REFP1 and REFN1.
13 REFN1 bidirectional Negative input of reference voltage source 1; normally connected to AVSS.
14 AIN8/IOUT/VB bidirectional ADC analog input channel AIN8, which can alternatively be the IDAC current source output (IOUT) or the bias voltage output (VB).
15 AIN9/IOUT/VB bidirectional ADC analog input channel AIN9, which can alternatively be the IDAC current source output (IOUT) or the bias voltage output (VB).
16 AIN10/IOUT/VB bidirectional ADC analog input channel AIN10, which can alternatively be the IDAC current source output (IOUT) or the bias voltage output (VB).
17 AIN11/IOUT/VB bidirectional ADC analog input channel AIN11, which can alternatively be the IDAC current source output (IOUT) or the bias voltage output (VB).
18 AIN12/IOUT/VB bidirectional ADC analog input channel AIN12, which can alternatively be the IDAC current source output (IOUT) or the bias voltage output (VB).
19 AIN13/IOUT/VB bidirectional ADC analog input channel AIN13, which can alternatively be the IDAC current source output (IOUT) or the bias voltage output (VB).
20 AIN14/IOUT/VB/REFP2 bidirectional ADC analog input channel AIN14, alternatively IOUT or VB, and also the positive input of reference source 2 (REFP2), with the ADC reference chosen by REFSEL<1:0>.
21 AIN15/IOUT/VB/REFN2 bidirectional ADC analog input channel AIN15, alternatively IOUT or VB, and also the negative input of reference source 2 (REFN2), with the ADC reference chosen by REFSEL<1:0>.
22 REFOUT output On-chip 2.5V internal reference output that requires a 1uF ceramic capacitor; if unused it must be left floating or grounded and must not be pulled up to the supply.
23 AVSS power_in Analog ground.
24 VBCOM output Dedicated bias voltage output that may be filtered to ground with a 0.1uF capacitor and routed on the PCB to the signal node needing bias.
25 PSW bidirectional Ground switch with 8 ohm on-impedance, enabled through the SWT_SIG register, and able to carry currents below 20mA.
26 AVDD power_in Analog supply, with a capacitor of at least 1uF between AVDD and AVSS.
27 SYNC input ADC synchronization input: when low the chip's internal operation is disabled, and going high starts operation so that multiple chips' conversion timing can be synchronized.
28 DOUT/RDY_N output SPI data output that requires an external pull-up of at least 100 kOhm to the supply, with 1 MOhm recommended when the data rate is below 800Hz.
29 DIN input SPI data input; no pull-up or pull-down resistor should be fitted to this pin.
30 SCLK input SPI clock input, recommended to be held low when not communicating; no pull-up or pull-down resistor should be fitted.
31 CLK bidirectional External 2.4576MHz precision clock input when CKSRSEL<1:0> is 10 or 11; when the internal RC clock is used, tie this pin to ground or set CKSRSEL<1:0>=01 to output the RC clock from this pin.
32 CSN input SPI chip select input, active low; no pull-up or pull-down resistor should be fitted.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer HCTmicro
Package QFN-32-EP(5x5)
Category Data Acquisition
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
电源电压 AVDD/DVDD -0.3 6 V 9
信号输入信号 Vsig -0.3 6 V 9
存储温度 TS -50 150 ℃ 9
工作温度 TJ -40 125 ℃ 9
电源电压 (IO 口电压 label as printed) AVDD/DVDD 2.3 5 5.5 V 9
正常模式工作电流 IACTIVE 380 uA 9
高功耗模式工作电流 IACTIVE_HP 950 uA 9
低功耗模式工作电流 IACTIVE_LP 280 uA 9
休眠电流 IPD 1 uA 9
上电复位电压 VPOR 1.9 2 2.1 V 9
掉电监测电压 VLVD 2.8 2.9 3 V 9
温度范围 TA -40 25 105 ℃ 9
ESD 模型 (HBM) 放电电压 ESD (HBM) -4000 4000 V HBM model 10
Latch-Up 测试电流 Latch-Up -200 200 mA @85℃ 10
输入信号高阈值 VIH 4 5.5 V DVDD 5V 10
输入信号低阈值 VIL -0.3 1 V DVDD 5V 10
施密特由低变高电压的阈值 VT+ 2.72 2.92 3.17 V DVDD 5V 10
施密特由高变低电压的阈值 VT- 1.85 2 2.17 V DVDD 5V 10
输入高电平的电流 IIH 1 uA DVDD 5V 10
输入低电平的电流 IIL -1 uA DVDD 5V 10
输出低电平 VOL 0.4 V @IOL current condition, DVDD 5V 10
输出高电平 VOH 4 V @IOH current condition, DVDD 5V 10
输出低电平电流@VOL (max) IOL 4.9 8.8 13.9 mA @VOL (max), DVDD 5V 10
输出高电平电流@VOH (min) IOH 5.5 15.6 29.9 mA @VOH (min), DVDD 5V 10

CAD (KiCad official)

  • Symbol: HCT6961-8
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: hct6961-8-etched.step / hct6961-8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hct6961-8.step / hct6961-8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HCTmicro datasheet (93 pp, sha256 1fb21f15d14c8618, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF