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Contents

README

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HCPL0600R2

onsemi · Logic Output Optoisolators · SO-8

HCPL0600R2 from onsemi, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 N/C unconnected Not connected; Figure 1 marks this pin as N/C for the single-channel HCPL0600 circuit drawing.
2 ANODE passive AlGaAs LED anode input; the recommended input current is 0 to 250 µA for low level and 6.3 to 15 mA for high level, with an initial threshold of 5.0 mA or less.
3 CATHODE passive AlGaAs LED cathode input; the LED reverse input voltage is rated at 5.0 V maximum per channel.
4 N/C unconnected Not connected; Figure 1 marks this pin as N/C for the single-channel HCPL0600 circuit drawing.
5 GND power_in Ground reference for the detector side; a 0.1 µF bypass capacitor should be placed as close as possible between VCC (pin 8) and this pin.
6 VO output Open-collector logic output that supports wired-OR; the output voltage is rated at 7.0 V maximum and the output current at 15 mA maximum, with an external pull-up of 330 to 4000 Ω.
7 VE input Enable input (single-channel devices only) with an internal pull-up; it must be held at 0 to 0.8 V for low level or 2.0 V to VCC for high level, and must not exceed VCC by more than 500 mV, and it is left unconnected when the enable function is not used.
8 VCC power_in Detector supply pin, operated from 4.5 V to 5.5 V and rated at 7.0 V maximum for one minute, and must be bypassed to GND (pin 5) with a 0.1 µF capacitor.

Key specifications

Parameter Value
Manufacturer onsemi
Package SO-8
Category Optoisolators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Current, Low Level IFL 0 250 µA 4
Input Current, High Level IFH 6.3 15 mA 4
Supply Voltage, Output VCC 4.5 5.5 V 4
Enable Voltage, Low Level VEL 0 0.8 V Single Channel only 4
Enable Voltage, High Level VEH 2 V Single Channel only; max printed as VCC 4
Operating Temperature TA -40 85 °C 4
Fan Out (TTL load) N 8 TTL Loads Single Channel 4
Output Pull-up Resistor RL 330 4000 Ω 4
Storage Temperature TSTG -40 125 °C 3
Operating Temperature TOPR -40 85 °C 3
Junction Temperature TJ -40 125 °C 3
DC/Average Forward Input Current IF 50 mA Each channel 3
Enable Input Voltage VE 5.5 V Not to exceed VCC by more than 500 mV; Single Channel Devices Only 3
Reverse Input Voltage VR 5 V Each channel 3
Power Dissipation PI 45 mW Each channel 3
Supply Voltage VCC 7 V 1 minute max 3
Output Current IO 15 mA Each channel 3
Output Voltage VO 7 V Each channel 3
Collector Output Power Dissipation PO 85 mW Each channel 3
Input Forward Voltage VF 1.75 1.8 V IF = 10 mA; typ at TA = 25°C 4
Input Reverse Breakdown Voltage BVR 5 V IR = 10 µA 4
Input Diode Temperature Coefficient VF/TA -1.5 mV/°C IF = 10 mA 4
High Level Supply Current ICCH 10 mA IF = 0 mA, VE = 0.5 V, VCC = 5.5 V; Single Channel 4
Low Level Supply Current ICCL 13 mA IF = 10 mA, VE = 0.5 V, VCC = 5.5 V; Single Channel 4
Low Level Enable Current IEL -1.6 mA VCC = 5.5 V, VE = 0.5 V; Single Channel 4
High Level Enable Current IEH -1.6 mA VCC = 5.5 V, VE = 2.0 V; Single Channel 4
High Level Enable Voltage VEH 2 V VCC = 5.5 V, IF = 10 mA; Single Channel 4
Low Level Enable Voltage VEL 0.8 V VCC = 5.5 V, IF = 10 mA; Single Channel; Note 3 4
Propagation Delay Time to Output High Level TPLH 20 75 ns RL = 350 Ω, TA = 25°C, CL = 15 pF; Fig. 22 5
Propagation Delay Time to Output Low Level TPHL 25 75 ns RL = 350 Ω, TA = 25°C, CL = 15 pF; Fig. 22 5
Pulse Width Distortion /TPHL−TPLH/ 35 ns RL = 350 Ω, CL = 15 pF; Fig. 20 5
Output Rise Time (10-90%) tr 50 ns RL = 350 Ω, CL = 15 pF; Single Ch 5
Output Fall Time (90-10%) tf 12 ns RL = 350 Ω, CL = 15 pF; Single Ch 5
Enable Propagation Delay Time to Output High Level tELH 20 ns IF = 7.5 mA, VEH = 3.5 V, RL = 350 Ω, CL = 15 pF; HCPL0600 5
Enable Propagation Delay Time to Output Low Level tEHL 20 ns IF = 7.5 mA, VEH = 3.5 V, RL = 350 Ω, CL = 15 pF; HCPL0600 5
Common Mode Transient Immunity (at Output High Level) /CMH/ 5000 V/µs RL = 350 Ω, TA = 25°C, IF = 0 mA, VOH (Min.) = 2.0 V; /VCM/ = 10 V; HCPL0600 5
Common Mode Transient Immunity (at Output Low Level) /CML/ 5000 V/µs RL = 350 Ω, TA = 25°C, IF = 7.5 mA, VOL (Max.) = 0.8 V; /VCM/ = 10 V; HCPL0600 5
High Level Output Current IOH 100 µA VCC = 5.5 V, VO = 5.5 V, IF = 250 µA, VE = 2.0 V 5
Low Level Output Voltage VOL 0.6 V VCC = 5.5 V, IF = 5 mA, VE = 2.0 V, IOL = 13 mA 5
Input Threshold Current IFT 5 mA VCC = 5.5 V, VO = 0.6 V, VE = 2.0 V, IOL = 13 mA 5
Withstand Insulation Test Voltage VISO 3750 VRMS RH < 50%, TA = 25°C, II-O ≤ 2 µA, t = 1 min 6

CAD (KiCad official)

  • Symbol: HCPL0600R2
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: hcpl0600r2-etched.step / hcpl0600r2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hcpl0600r2.step / hcpl0600r2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (16 pp, sha256 75a33de471c59fc9, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF