component
HCPL-4506-C1L0
Public Made by Adomby adom
KTP Logic Output Optoisolators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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HCPL-4506-C1L0
KTP · Logic Output Optoisolators · DIP-8
HCPL-4506-C1L0 from KTP, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not connected (no internal connection; leave unconnected). |
| 2 | Anode | passive | LED positive input; the datasheet gives an ON forward current of 10 mA to 20 mA and an absolute maximum average input current of 25 mA. |
| 3 | Cathode | passive | LED negative input; the reverse input voltage (pin 3-2) is limited to a maximum of 5 V. |
| 4 | NC | unconnected | Not connected (no internal connection; leave unconnected). |
| 5 | GND | power_in | Ground reference for the output stage and supply; a 0.1 µF bypass capacitor is required between pins 5 and 8. |
| 6 | VO | output | Open-collector-type logic output with average output current limited to 15 mA and output voltage (pin 6-5) limited to -0.5 V to 30 V; connect to pin 7 to use the internal 20 kΩ pull-up. |
| 7 | VL | passive | Internal 20 kΩ pull-up resistor terminal, which is shorted to pin 6 to enable the integrated pull-up; its voltage is limited to -0.5 V to VCC. |
| 8 | VCC | power_in | Supply voltage with a recommended range of 4.5 V to 30 V (absolute maximum 30 V, referenced to pin 5); a 0.1 µF bypass capacitor to GND is required. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | KTP |
| Package | DIP-8 |
| Category | Optoisolators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 贮存温度 (Storage temperature) | TS | -55 | 125 | ℃ | 3 | ||
| 工作温度 (Operating temperature) | TA | -40 | 100 | ℃ | 3 | ||
| 平均输入电流 (Average input current) | IF(AVG) | 25 | mA | 3 | |||
| 峰值输入电流 (Peak input current) | IF(PEAK) | 50 | mA | 占空比50%，脉宽≤1ms | 3 | ||
| 峰值瞬态输入电流 (Peak transient input current) | IF(TRAN) | 1 | A | 脉宽<1us，300pps | 3 | ||
| 反向输入电压 (Reverse input voltage) | VR | 5 | V | 引脚3-2 | 3 | ||
| 平均输出电流 (Average output current) | IO(AVG) | 15 | mA | 引脚6 | 3 | ||
| 电阻器电压 (Resistor voltage) | V7 | -0.5 | V | 引脚7；上限印为VCC | 3 | ||
| 输出电压 (Output voltage) | VO | -0.5 | 30 | V | 引脚6-5 | 3 | |
| 电源电压 (Supply voltage) | VCC | -0.5 | 30 | V | 引脚8-5 | 3 | |
| 输出耗散功率 (Output power dissipation) | PO | 100 | mW | 3 | |||
| 总耗散功率 (Total power dissipation) | PT | 145 | mW | 3 | |||
| 电源电压 (Supply voltage) | VCC | 4.5 | 30 | V | 4 | ||
| 输出电压 (Output voltage) | VO | 0 | 30 | V | 4 | ||
| 正向输入电流 (ON) (Forward input current, ON) | IF(ON) | 10 | 20 | mA | 4 | ||
| 正向输入电压 (OFF) (Forward input voltage, OFF) | VF(OFF) | -5 | 0.8 | V | 4 | ||
| 工作温度 (Operating temperature) | TA | -40 | 100 | ℃ | 4 | ||
| 电流传输比 (Current transfer ratio) | CTR | 44 | 83 | % | IF=10mA，VO=0.6V | 4 | |
| 低电平输出电流 (Low-level output current) | IOL | 4.4 | 8.3 | mA | IF=10mA，VO=0.6V | 4 | |
| 低电平输出电压 (Low-level output voltage) | VOL | 0.2 | 0.6 | V | IO=2.4mA | 4 | |
| 输入阈值电流 (Input threshold current) | ITH | 0.8 | mA | VO=0.8V，IO=0.75mA | 4 | ||
| 高电平输出电流 (High-level output current) | IOH | 5 | 50 | uA | VF=0.8V | 4 | |
| 高电平电源电流 (High-level supply current) | ICCH | 0.6 | 1.3 | mA | VF=0.8V，VO=Open | 4 | |
| 低电平电源电流 (Low-level supply current) | ICCL | 0.6 | 1.3 | mA | IF=10mA，VO=Open | 4 | |
| 输入正向电压 (Input forward voltage) | VF | 1.3 | 1.8 | V | IF=10mA | 4 | |
| 正向电压的温度系数 (Forward voltage temperature coefficient) | ∆VF/∆TA | -1.6 | mV/℃ | IF=10mA | 4 | ||
| 输入反向击穿电压 (Input reverse breakdown voltage) | BVR | 5 | V | IR=10uA | 4 | ||
| 输入电容 (Input capacitance) | CIN | 60 | pF | f=1MHz，VF=0V | 4 | ||
| 内部上拉电阻 (Internal pull-up resistor) | RL | 14 | 20 | 25 | kΩ | TA=25℃ | 4 |
| 内部上拉电阻温度系数 (Internal pull-up resistor temperature coefficient) | ∆RL/∆TA | 0.014 | kΩ/℃ | 4 | |||
| 低电平输出延迟时间 (Propagation delay, low-level output, RL=20kΩ external) | tPHL | 30 | 200 | 400 | ns | CL=100pF | 5 |
| 高电平输出延迟时间 (Propagation delay, high-level output, RL=20kΩ external) | tPLH | 270 | 400 | 550 | ns | CL=100pF | 5 |
| 脉宽失真 (Pulse width distortion, RL=20kΩ external) | PWD | 200 | 450 | ns | 5 | ||
| 任意两通路间传输延迟差 (Propagation delay skew, RL=20kΩ external) | tPLH-tPHL | -150 | 200 | 450 | ns | CL=100pF | 5 |
| 高电平输出共模瞬态抑制比 (High-level common-mode transient immunity, RL=20kΩ external) | /CMH/ | 15 | 30 | kV/us | IF=0mA，VO＞3.0V | 5 | |
| 低电平输出共模瞬态抑制比 (Low-level common-mode transient immunity, RL=20kΩ external) | /CML/ | 15 | 30 | kV/us | IF=10mA，VO＜1.0V | 5 | |
| 低电平输出延迟时间 (Propagation delay, low-level output, internal pull-up) | tPHL | 20 | 200 | 400 | ns | IF(ON)=10mA，VF(OFF)=0.8V，VCC=15.0V，CL=100pF，VTHLH=2.0V，VTHHL=1.5V，f=20kHz，占空比=10% | 5 |
| 高电平输出延迟时间 (Propagation delay, high-level output, internal pull-up) | tPLH | 220 | 450 | 650 | ns | IF(ON)=10mA，VF(OFF)=0.8V，VCC=15.0V，CL=100pF，VTHLH=2.0V，VTHHL=1.5V，f=20kHz，占空比=10% | 5 |
| 脉宽失真 (Pulse width distortion, internal pull-up) | PWD | 250 | 500 | ns | IF(ON)=10mA，VF(OFF)=0.8V，VCC=15.0V，CL=100pF，VTHLH=2.0V，VTHHL=1.5V，f=20kHz，占空比=10% | 5 | |
| 任意两通路间传输延迟差 (Propagation delay skew, internal pull-up) | tPLH-tPHL | -150 | 250 | 500 | ns | IF(ON)=10mA，VF(OFF)=0.8V，VCC=15.0V，CL=100pF，VTHLH=2.0V，VTHHL=1.5V，f=20kHz，占空比=10% | 5 |
| 高电平输出共模瞬态抑制比 (High-level common-mode transient immunity, internal pull-up) | /CMH/ | 30 | kV/us | IF=0mA，VO＞3.0V | 5 | ||
| 低电平输出共模瞬态抑制比 (Low-level common-mode transient immunity, internal pull-up) | /CML/ | 30 | kV/us | IF=16mA，VO＜1.0V | 5 | ||
| 电源抑制 (Power supply rejection) | PSR | 1 | VP-P | 方波，tRISE、tFALL＞5ns，无旁路电容 | 5 | ||
| 入出间瞬时耐压 (Withstand isolation voltage) | VISO | 3750 | Vrms | RH<50%，t=1min，TA=25°C | 5 | ||
| 入出间电阻 (Isolation resistance) | RI-O | 1012 | Ω | VI-O=500Vdc | 5 | ||
| 入出间电容 (Isolation capacitance) | CI-O | 0.6 | pF | f=1MHz | 5 |
CAD (KiCad official)
- Symbol:
HCPL-4506-C1L0 - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
hcpl-4506-c1l0-etched.step/hcpl-4506-c1l0-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hcpl-4506-c1l0.step/hcpl-4506-c1l0.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: KTP datasheet (7 pp, sha256
b7ba564c748494e8, retrieved 2026-10-14, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HCPL-4506-C1L0
**KTP** · Logic Output Optoisolators · DIP-8
HCPL-4506-C1L0 from KTP, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not connected (no internal connection; leave unconnected). |
| 2 | Anode | passive | LED positive input; the datasheet gives an ON forward current of 10 mA to 20 mA and an absolute maximum average input current of 25 mA. |
| 3 | Cathode | passive | LED negative input; the reverse input voltage (pin 3-2) is limited to a maximum of 5 V. |
| 4 | NC | unconnected | Not connected (no internal connection; leave unconnected). |
| 5 | GND | power_in | Ground reference for the output stage and supply; a 0.1 µF bypass capacitor is required between pins 5 and 8. |
| 6 | VO | output | Open-collector-type logic output with average output current limited to 15 mA and output voltage (pin 6-5) limited to -0.5 V to 30 V; connect to pin 7 to use the internal 20 kΩ pull-up. |
| 7 | VL | passive | Internal 20 kΩ pull-up resistor terminal, which is shorted to pin 6 to enable the integrated pull-up; its voltage is limited to -0.5 V to VCC. |
| 8 | VCC | power_in | Supply voltage with a recommended range of 4.5 V to 30 V (absolute maximum 30 V, referenced to pin 5); a 0.1 µF bypass capacitor to GND is required. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | KTP |
| Package | DIP-8 |
| Category | Optoisolators |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 贮存温度 (Storage temperature) | TS | -55 | | 125 | ℃ | | 3 |
| 工作温度 (Operating temperature) | TA | -40 | | 100 | ℃ | | 3 |
| 平均输入电流 (Average input current) | IF(AVG) | | | 25 | mA | | 3 |
| 峰值输入电流 (Peak input current) | IF(PEAK) | | | 50 | mA | 占空比50%，脉宽≤1ms | 3 |
| 峰值瞬态输入电流 (Peak transient input current) | IF(TRAN) | | | 1 | A | 脉宽<1us，300pps | 3 |
| 反向输入电压 (Reverse input voltage) | VR | | | 5 | V | 引脚3-2 | 3 |
| 平均输出电流 (Average output current) | IO(AVG) | | | 15 | mA | 引脚6 | 3 |
| 电阻器电压 (Resistor voltage) | V7 | -0.5 | | | V | 引脚7；上限印为VCC | 3 |
| 输出电压 (Output voltage) | VO | -0.5 | | 30 | V | 引脚6-5 | 3 |
| 电源电压 (Supply voltage) | VCC | -0.5 | | 30 | V | 引脚8-5 | 3 |
| 输出耗散功率 (Output power dissipation) | PO | | | 100 | mW | | 3 |
| 总耗散功率 (Total power dissipation) | PT | | | 145 | mW | | 3 |
| 电源电压 (Supply voltage) | VCC | 4.5 | | 30 | V | | 4 |
| 输出电压 (Output voltage) | VO | 0 | | 30 | V | | 4 |
| 正向输入电流 (ON) (Forward input current, ON) | IF(ON) | 10 | | 20 | mA | | 4 |
| 正向输入电压 (OFF) (Forward input voltage, OFF) | VF(OFF) | -5 | | 0.8 | V | | 4 |
| 工作温度 (Operating temperature) | TA | -40 | | 100 | ℃ | | 4 |
| 电流传输比 (Current transfer ratio) | CTR | 44 | 83 | | % | IF=10mA，VO=0.6V | 4 |
| 低电平输出电流 (Low-level output current) | IOL | 4.4 | 8.3 | | mA | IF=10mA，VO=0.6V | 4 |
| 低电平输出电压 (Low-level output voltage) | VOL | | 0.2 | 0.6 | V | IO=2.4mA | 4 |
| 输入阈值电流 (Input threshold current) | ITH | | | 0.8 | mA | VO=0.8V，IO=0.75mA | 4 |
| 高电平输出电流 (High-level output current) | IOH | | 5 | 50 | uA | VF=0.8V | 4 |
| 高电平电源电流 (High-level supply current) | ICCH | | 0.6 | 1.3 | mA | VF=0.8V，VO=Open | 4 |
| 低电平电源电流 (Low-level supply current) | ICCL | | 0.6 | 1.3 | mA | IF=10mA，VO=Open | 4 |
| 输入正向电压 (Input forward voltage) | VF | | 1.3 | 1.8 | V | IF=10mA | 4 |
| 正向电压的温度系数 (Forward voltage temperature coefficient) | ∆VF/∆TA | | -1.6 | | mV/℃ | IF=10mA | 4 |
| 输入反向击穿电压 (Input reverse breakdown voltage) | BVR | 5 | | | V | IR=10uA | 4 |
| 输入电容 (Input capacitance) | CIN | | 60 | | pF | f=1MHz，VF=0V | 4 |
| 内部上拉电阻 (Internal pull-up resistor) | RL | 14 | 20 | 25 | kΩ | TA=25℃ | 4 |
| 内部上拉电阻温度系数 (Internal pull-up resistor temperature coefficient) | ∆RL/∆TA | | 0.014 | | kΩ/℃ | | 4 |
| 低电平输出延迟时间 (Propagation delay, low-level output, RL=20kΩ external) | tPHL | 30 | 200 | 400 | ns | CL=100pF | 5 |
| 高电平输出延迟时间 (Propagation delay, high-level output, RL=20kΩ external) | tPLH | 270 | 400 | 550 | ns | CL=100pF | 5 |
| 脉宽失真 (Pulse width distortion, RL=20kΩ external) | PWD | | 200 | 450 | ns | | 5 |
| 任意两通路间传输延迟差 (Propagation delay skew, RL=20kΩ external) | tPLH-tPHL | -150 | 200 | 450 | ns | CL=100pF | 5 |
| 高电平输出共模瞬态抑制比 (High-level common-mode transient immunity, RL=20kΩ external) | /CMH/ | 15 | 30 | | kV/us | IF=0mA，VO＞3.0V | 5 |
| 低电平输出共模瞬态抑制比 (Low-level common-mode transient immunity, RL=20kΩ external) | /CML/ | 15 | 30 | | kV/us | IF=10mA，VO＜1.0V | 5 |
| 低电平输出延迟时间 (Propagation delay, low-level output, internal pull-up) | tPHL | 20 | 200 | 400 | ns | IF(ON)=10mA，VF(OFF)=0.8V，VCC=15.0V，CL=100pF，VTHLH=2.0V，VTHHL=1.5V，f=20kHz，占空比=10% | 5 |
| 高电平输出延迟时间 (Propagation delay, high-level output, internal pull-up) | tPLH | 220 | 450 | 650 | ns | IF(ON)=10mA，VF(OFF)=0.8V，VCC=15.0V，CL=100pF，VTHLH=2.0V，VTHHL=1.5V，f=20kHz，占空比=10% | 5 |
| 脉宽失真 (Pulse width distortion, internal pull-up) | PWD | | 250 | 500 | ns | IF(ON)=10mA，VF(OFF)=0.8V，VCC=15.0V，CL=100pF，VTHLH=2.0V，VTHHL=1.5V，f=20kHz，占空比=10% | 5 |
| 任意两通路间传输延迟差 (Propagation delay skew, internal pull-up) | tPLH-tPHL | -150 | 250 | 500 | ns | IF(ON)=10mA，VF(OFF)=0.8V，VCC=15.0V，CL=100pF，VTHLH=2.0V，VTHHL=1.5V，f=20kHz，占空比=10% | 5 |
| 高电平输出共模瞬态抑制比 (High-level common-mode transient immunity, internal pull-up) | /CMH/ | 30 | | | kV/us | IF=0mA，VO＞3.0V | 5 |
| 低电平输出共模瞬态抑制比 (Low-level common-mode transient immunity, internal pull-up) | /CML/ | 30 | | | kV/us | IF=16mA，VO＜1.0V | 5 |
| 电源抑制 (Power supply rejection) | PSR | | 1 | | VP-P | 方波，tRISE、tFALL＞5ns，无旁路电容 | 5 |
| 入出间瞬时耐压 (Withstand isolation voltage) | VISO | 3750 | | | Vrms | RH<50%，t=1min，TA=25°C | 5 |
| 入出间电阻 (Isolation resistance) | RI-O | 1012 | | | Ω | VI-O=500Vdc | 5 |
| 入出间电容 (Isolation capacitance) | CI-O | | 0.6 | | pF | f=1MHz | 5 |
## CAD (KiCad official)
- Symbol: `HCPL-4506-C1L0`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files: `hcpl-4506-c1l0-etched.step` / `hcpl-4506-c1l0-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hcpl-4506-c1l0.step` / `hcpl-4506-c1l0.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [KTP datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590922114554159104) (7 pp, sha256 `b7ba564c748494e8`, retrieved 2026-10-14, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/hcpl-4506-c1l0-datasheet.pdf)