component
HCPL-3760-000E
Public Made by Adomby adom
Broadcom/AVAGO Logic Output Optoisolators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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HCPL-3760-000E
Broadcom/AVAGO · Logic Output Optoisolators · DIP-8
HCPL-3760-000E from Broadcom/AVAGO, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AC | input | AC input terminal (used with pin 4), with typical VTH+ of 4.9 V and VTH- of 3.7 V measured as |
| 2 | DC+ | input | Positive DC input terminal, with typical VTH+ of 3.7 V and VTH- of 2.6 V measured as V2 - V3 with pins 1 and 4 open. |
| 3 | DC- | input | Negative DC input terminal, the return for pin 2 in the DC threshold measurement V2 - V3. |
| 4 | AC | input | Second AC input terminal (used with pin 1), with typical VTH+ of 4.9 V and VTH- of 3.7 V measured as |
| 5 | GND | power_in | Output-side ground, the reference for VCC (pins 8-5, max 20 V) and VO (pins 6-5, max 20 V). |
| 6 | VO | output | Open-collector logic output that goes low when the input exceeds VTH+, rated max 20 V, with VOL max 0.4 V at IOL = 4.2 mA and IOH max 100 µA. |
| 7 | NC | unconnected | No connection. |
| 8 | VCC | power_in | Output-side supply with a recommended range of 2 to 18 V and an absolute maximum of 20 V, bypassed by a 0.01 µF ceramic capacitor to pin 5. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Broadcom/AVAGO |
| Package | DIP-8 |
| Category | Optoisolators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Threshold Current (positive-going) | ITH+ | 0.87 | 1.2 | 1.56 | mA | VIN = VTH+; VCC = 4.5 V; VO = 0.4 V; IO ≥ 4.2 mA | 8 |
| Input Threshold Current (negative-going) | ITH- | 0.43 | 0.6 | 0.8 | mA | VIN = VTH-; VCC = 4.5 V; VO = 2.4 V; IOH ≤ 100 µA | 8 |
| DC Input Threshold Voltage (positive-going) | VTH+ | 3.35 | 3.7 | 4.05 | V | VIN = V2 - V3; Pins 1 & 4 Open; VCC = 4.5 V; VO = 0.4 V; IO ≥ 4.2 mA | 8 |
| DC Input Threshold Voltage (negative-going) | VTH- | 2.01 | 2.6 | 2.86 | V | VIN = V2 - V3; Pins 1 & 4 Open; VCC = 4.5 V; VO = 2.4 V; IO ≤ 100 µA | 8 |
| AC Input Threshold Voltage (positive-going) | VTH+ | 4.23 | 4.9 | 5.5 | V | VIN = /V1 - V4/; Pins 2 & 3 Open; VCC = 4.5 V; VO = 0.4 V; IO ≥ 4.2 mA | 8 |
| AC Input Threshold Voltage (negative-going) | VTH- | 2.87 | 3.7 | 4.2 | V | VIN = /V1 - V4/; Pins 2 & 3 Open; VCC = 4.5 V; VO = 2.4 V; IO ≤ 100 µA | 8 |
| Input Clamp Voltage 1 | VIHC1 | 5.4 | 6 | 6.6 | V | VIHC1 = V2 - V3; V3 = GND; IIN = 10 mA; Pins 1 & 4 Connected to Pin 3 | 8 |
| Input Clamp Voltage 2 | VIHC2 | 6.1 | 6.7 | 7.3 | V | VIHC2 = /V1 - V4/; /IIN/ = 10 mA; Pins 2 & 3 Open | 8 |
| Input Clamp Voltage 3 | VIHC3 | 12 | 13.4 | V | VIHC3 = V2 - V3; V3 = GND; IIN = 15 mA; Pins 1 & 4 Open | 8 | |
| Input Current | IIN | 1.5 | 1.8 | 2.2 | mA | VIN = V2, V3 = 5.0 V; Pins 1 & 4 Open | 8 |
| Logic Low Output Voltage | VOL | 0.1 | 0.4 | V | VCC = 4.5 V; IOL = 4.2 mA | 8 | |
| Logic High Output Current | IOH | 100 | µA | VOH = VCC = 18 V | 8 | ||
| Logic Low Supply Current | ICCL | 0.7 | 3 | mA | V2, V3 = 5.0 V; VO = Open; VCC = 5.0 V | 8 | |
| Logic High Supply Current | ICCH | 0.002 | 4 | µA | VCC = 18 V; VO = Open | 8 | |
| Propagation Delay Time to Logic Low at Output | tPHL | 4.5 | 15 | µs | RL = 4.7 kΩ, CL = 30 pF; TA = 25°C, VCC = 5.0 V | 9 | |
| Propagation Delay Time to Logic High at Output | tPLH | 8 | 40 | µs | RL = 4.7 kΩ, CL = 30 pF; TA = 25°C, VCC = 5.0 V | 9 | |
| Input-Output Momentary Withstand Voltage | VISO | 3750 | V rms | RH 50%, t = 1 min; TA = 25°C | 9 | ||
| Common Mode Transient Immunity at Logic High Output | /CMH/ | 4000 | V/µs | IIN = 0 mA, RL = 4.7 kΩ, VO min = 2.0 V, VCM = 1400 V | 9 | ||
| Common Mode Transient Immunity at Logic Low Output | /CML/ | 600 | V/µs | IIN = 1.56 mA, RL = 4.7 kΩ, VO max = 0.8 V, VCM = 140 V | 9 | ||
| Supply Voltage | VCC | 2 | 18 | V | 7 | ||
| Operating Temperature | TA | 0 | 70 | °C | 7 | ||
| Operating Frequency | f | 0 | 4 | kHz | 7 | ||
| Storage Temperature | TS | -55 | 125 | °C | 7 | ||
| Operating Temperature | TA | -40 | 85 | °C | 7 | ||
| Lead Soldering Cycle Temperature | 260 | °C | Time 10 s | 7 | |||
| Input Current Average | IIN | 50 | mA | 7 | |||
| Input Current Surge | IIN | 140 | mA | 7 | |||
| Input Current Transient | IIN | 500 | mA | 7 | |||
| Input Voltage (Pins 2-3) | VIN | -0.5 | V | 7 | |||
| Input Power Dissipation | PIN | 230 | mW | HCPL-3700/3760 | 7 | ||
| Total Package Power Dissipation | PT | 305 | mW | HCPL-3700/3760 | 7 | ||
| Output Power Dissipation | PO | 210 | mW | HCPL-3700/3760 | 7 | ||
| Output Current Average | IO | 30 | mA | 7 | |||
| Supply Voltage (Pins 8-5) | VCC | -0.5 | 20 | V | 7 | ||
| Output Voltage (Pins 6-5) | VO | -0.5 | 20 | V | 7 | ||
| Input Current Hysteresis | IHYS | 0.6 | mA | IHYS = ITH+, ITH- | 8 | ||
| Voltage Hysteresis | VHYS | 1.2 | V | VHYS = VTH+, VTH- | 8 | ||
| Input Clamp Voltage (low) | VILC | -0.76 | V | VILC = V2 - V3; V3 = GND; IIN = -10 mA | 8 | ||
| Bridge Diode Forward Voltage VD1,2 | VD1,2 | 0.51 | V | IIN = 1.5 mA | 8 | ||
| Bridge Diode Forward Voltage VD3,4 | VD3,4 | 0.71 | V | IIN = 1.5 mA | 8 | ||
| Input Capacitance | CIN | 50 | pF | f = 1 MHz; VIN = 0 V, Pins 2 & 3, Pins 1 & 4 Open | 8 | ||
| Output Rise Time | tr | 14 | µs | RL = 4.7 kΩ, CL = 30 pF (10-90%) | 9 | ||
| Output Fall Time | tf | 0.4 | µs | RL = 4.7 kΩ, CL = 30 pF (90-10%) | 9 | ||
| Input-Output Capacitance | CI-O | 0.6 | pF | f = 1 MHz; VI-O = 0 Vdc | 9 |
CAD (KiCad official)
- Symbol:
HCPL-3760-000E - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
hcpl-3760-000e-etched.step/hcpl-3760-000e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hcpl-3760-000e.step/hcpl-3760-000e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Broadcom/AVAGO datasheet (14 pp, sha256
0122d32590fa98ef, retrieved 2026-10-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HCPL-3760-000E
**Broadcom/AVAGO** · Logic Output Optoisolators · DIP-8
HCPL-3760-000E from Broadcom/AVAGO, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AC | input | AC input terminal (used with pin 4), with typical VTH+ of 4.9 V and VTH- of 3.7 V measured as |V1 - V4| with pins 2 and 3 open. |
| 2 | DC+ | input | Positive DC input terminal, with typical VTH+ of 3.7 V and VTH- of 2.6 V measured as V2 - V3 with pins 1 and 4 open. |
| 3 | DC- | input | Negative DC input terminal, the return for pin 2 in the DC threshold measurement V2 - V3. |
| 4 | AC | input | Second AC input terminal (used with pin 1), with typical VTH+ of 4.9 V and VTH- of 3.7 V measured as |V1 - V4| with pins 2 and 3 open. |
| 5 | GND | power_in | Output-side ground, the reference for VCC (pins 8-5, max 20 V) and VO (pins 6-5, max 20 V). |
| 6 | VO | output | Open-collector logic output that goes low when the input exceeds VTH+, rated max 20 V, with VOL max 0.4 V at IOL = 4.2 mA and IOH max 100 µA. |
| 7 | NC | unconnected | No connection. |
| 8 | VCC | power_in | Output-side supply with a recommended range of 2 to 18 V and an absolute maximum of 20 V, bypassed by a 0.01 µF ceramic capacitor to pin 5. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Broadcom/AVAGO |
| Package | DIP-8 |
| Category | Optoisolators |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Threshold Current (positive-going) | ITH+ | 0.87 | 1.2 | 1.56 | mA | VIN = VTH+; VCC = 4.5 V; VO = 0.4 V; IO ≥ 4.2 mA | 8 |
| Input Threshold Current (negative-going) | ITH- | 0.43 | 0.6 | 0.8 | mA | VIN = VTH-; VCC = 4.5 V; VO = 2.4 V; IOH ≤ 100 µA | 8 |
| DC Input Threshold Voltage (positive-going) | VTH+ | 3.35 | 3.7 | 4.05 | V | VIN = V2 - V3; Pins 1 & 4 Open; VCC = 4.5 V; VO = 0.4 V; IO ≥ 4.2 mA | 8 |
| DC Input Threshold Voltage (negative-going) | VTH- | 2.01 | 2.6 | 2.86 | V | VIN = V2 - V3; Pins 1 & 4 Open; VCC = 4.5 V; VO = 2.4 V; IO ≤ 100 µA | 8 |
| AC Input Threshold Voltage (positive-going) | VTH+ | 4.23 | 4.9 | 5.5 | V | VIN = /V1 - V4/; Pins 2 & 3 Open; VCC = 4.5 V; VO = 0.4 V; IO ≥ 4.2 mA | 8 |
| AC Input Threshold Voltage (negative-going) | VTH- | 2.87 | 3.7 | 4.2 | V | VIN = /V1 - V4/; Pins 2 & 3 Open; VCC = 4.5 V; VO = 2.4 V; IO ≤ 100 µA | 8 |
| Input Clamp Voltage 1 | VIHC1 | 5.4 | 6 | 6.6 | V | VIHC1 = V2 - V3; V3 = GND; IIN = 10 mA; Pins 1 & 4 Connected to Pin 3 | 8 |
| Input Clamp Voltage 2 | VIHC2 | 6.1 | 6.7 | 7.3 | V | VIHC2 = /V1 - V4/; /IIN/ = 10 mA; Pins 2 & 3 Open | 8 |
| Input Clamp Voltage 3 | VIHC3 | | 12 | 13.4 | V | VIHC3 = V2 - V3; V3 = GND; IIN = 15 mA; Pins 1 & 4 Open | 8 |
| Input Current | IIN | 1.5 | 1.8 | 2.2 | mA | VIN = V2, V3 = 5.0 V; Pins 1 & 4 Open | 8 |
| Logic Low Output Voltage | VOL | | 0.1 | 0.4 | V | VCC = 4.5 V; IOL = 4.2 mA | 8 |
| Logic High Output Current | IOH | | | 100 | µA | VOH = VCC = 18 V | 8 |
| Logic Low Supply Current | ICCL | | 0.7 | 3 | mA | V2, V3 = 5.0 V; VO = Open; VCC = 5.0 V | 8 |
| Logic High Supply Current | ICCH | | 0.002 | 4 | µA | VCC = 18 V; VO = Open | 8 |
| Propagation Delay Time to Logic Low at Output | tPHL | | 4.5 | 15 | µs | RL = 4.7 kΩ, CL = 30 pF; TA = 25°C, VCC = 5.0 V | 9 |
| Propagation Delay Time to Logic High at Output | tPLH | | 8 | 40 | µs | RL = 4.7 kΩ, CL = 30 pF; TA = 25°C, VCC = 5.0 V | 9 |
| Input-Output Momentary Withstand Voltage | VISO | 3750 | | | V rms | RH 50%, t = 1 min; TA = 25°C | 9 |
| Common Mode Transient Immunity at Logic High Output | /CMH/ | 4000 | | | V/µs | IIN = 0 mA, RL = 4.7 kΩ, VO min = 2.0 V, VCM = 1400 V | 9 |
| Common Mode Transient Immunity at Logic Low Output | /CML/ | 600 | | | V/µs | IIN = 1.56 mA, RL = 4.7 kΩ, VO max = 0.8 V, VCM = 140 V | 9 |
| Supply Voltage | VCC | 2 | | 18 | V | | 7 |
| Operating Temperature | TA | 0 | | 70 | °C | | 7 |
| Operating Frequency | f | 0 | | 4 | kHz | | 7 |
| Storage Temperature | TS | -55 | | 125 | °C | | 7 |
| Operating Temperature | TA | -40 | | 85 | °C | | 7 |
| Lead Soldering Cycle Temperature | | | | 260 | °C | Time 10 s | 7 |
| Input Current Average | IIN | | | 50 | mA | | 7 |
| Input Current Surge | IIN | | | 140 | mA | | 7 |
| Input Current Transient | IIN | | | 500 | mA | | 7 |
| Input Voltage (Pins 2-3) | VIN | -0.5 | | | V | | 7 |
| Input Power Dissipation | PIN | | | 230 | mW | HCPL-3700/3760 | 7 |
| Total Package Power Dissipation | PT | | | 305 | mW | HCPL-3700/3760 | 7 |
| Output Power Dissipation | PO | | | 210 | mW | HCPL-3700/3760 | 7 |
| Output Current Average | IO | | | 30 | mA | | 7 |
| Supply Voltage (Pins 8-5) | VCC | -0.5 | | 20 | V | | 7 |
| Output Voltage (Pins 6-5) | VO | -0.5 | | 20 | V | | 7 |
| Input Current Hysteresis | IHYS | | 0.6 | | mA | IHYS = ITH+, ITH- | 8 |
| Voltage Hysteresis | VHYS | | 1.2 | | V | VHYS = VTH+, VTH- | 8 |
| Input Clamp Voltage (low) | VILC | | -0.76 | | V | VILC = V2 - V3; V3 = GND; IIN = -10 mA | 8 |
| Bridge Diode Forward Voltage VD1,2 | VD1,2 | | 0.51 | | V | IIN = 1.5 mA | 8 |
| Bridge Diode Forward Voltage VD3,4 | VD3,4 | | 0.71 | | V | IIN = 1.5 mA | 8 |
| Input Capacitance | CIN | | 50 | | pF | f = 1 MHz; VIN = 0 V, Pins 2 & 3, Pins 1 & 4 Open | 8 |
| Output Rise Time | tr | | 14 | | µs | RL = 4.7 kΩ, CL = 30 pF (10-90%) | 9 |
| Output Fall Time | tf | | 0.4 | | µs | RL = 4.7 kΩ, CL = 30 pF (90-10%) | 9 |
| Input-Output Capacitance | CI-O | | 0.6 | | pF | f = 1 MHz; VI-O = 0 Vdc | 9 |
## CAD (KiCad official)
- Symbol: `HCPL-3760-000E`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files: `hcpl-3760-000e-etched.step` / `hcpl-3760-000e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hcpl-3760-000e.step` / `hcpl-3760-000e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Broadcom/AVAGO datasheet](docs/hcpl-3760-000e-datasheet.pdf) (14 pp, sha256 `0122d32590fa98ef`, retrieved 2026-10-26, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/hcpl-3760-000e-datasheet.pdf)