component
HCPL-3700-000E
Public Made by Adomby adom
Broadcom AVAGO Transistor, Photovoltaic Output Optoisolators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "hcpl-3700-000e",
"version": "0.1.0",
"type": "component",
"description": "Broadcom AVAGO Transistor, Photovoltaic Output Optoisolators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"optoisolators",
"hcpl-3700-000e",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"hcpl-3700-000e.kicad_sym",
"hcpl-3700-000e.kicad_mod",
"hcpl-3700-000e.glb",
"hcpl-3700-000e.step",
"hcpl-3700-000e.lbr",
"docs/hero.png",
"docs/hcpl-3700-000e-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"hcpl-3700-000e-hero.glb",
"hcpl-3700-000e-hero.overlay.json",
"hcpl-3700-000e-etched.glb"
],
"component": {
"mpn": "HCPL-3700-000E",
"manufacturer": "Broadcom AVAGO",
"package": "DIP-8",
"pin_count": 8,
"category": "Optoisolators",
"subcategory": "Transistor, Photovoltaic Output Optoisolators",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603038658954489856",
"parts": {
"symbol": "hcpl-3700-000e.kicad_sym",
"footprint": "hcpl-3700-000e.kicad_mod",
"model_3d": "hcpl-3700-000e-hero.glb",
"model_3d_plain": "hcpl-3700-000e-etched.glb",
"model_3d_step": "hcpl-3700-000e-etched.step",
"model_3d_step_plain": "hcpl-3700-000e.step",
"lbr": "hcpl-3700-000e.lbr"
},
"distributor_links": {
"lcsc": "C692043",
"digikey": "516-1545-5-ND",
"mouser": "630-HCPL-3700-000E"
},
"distributor_check": {
"checked_at": "2026-10-16T06:17:07Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "516-1545-5-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "630-HCPL-3700-000E",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "AC",
"type": "input",
"description": "AC sense input (with pin 4) for the threshold buffer; AC VTH+ is 4.9 V typ and VTH- is 3.7 V typ, and the input clamps to about 6.7 V typ when pins 2 and 3 are open."
},
{
"number": "2",
"name": "DC+",
"type": "input",
"description": "Positive DC sense input (with pin 3); DC VTH+ is 3.7 V typ and VTH- is 2.6 V typ, and the input current is 2.5 mA typ at threshold for HCPL-3700 (1.2 mA for HCPL-3760)."
},
{
"number": "3",
"name": "DC-",
"type": "input",
"description": "Negative DC sense input (with pin 2) and the reference for the DC input clamp, with the input current limited to a 50 mA average maximum per lead."
},
{
"number": "4",
"name": "AC",
"type": "input",
"description": "AC sense input (with pin 1) for the threshold buffer; it is the second terminal for the AC threshold and clamp measurements in the datasheet."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Ground reference for VCC and the open-collector output (pins 8-5 supply and pins 6-5 output), with VCC and VO each rated -0.5 V to 20 V relative to this pin."
},
{
"number": "6",
"name": "VO",
"type": "output",
"description": "Open-collector logic output that is low (VOL 0.4 V max at IOL 4.2 mA, VCC 4.5 V) when the input exceeds VTH+ and high through an external pull-up when the input falls below VTH-; the average output current is limited to 30 mA and VO is rated -0.5 V to 20 V."
},
{
"number": "7",
"name": "NC",
"type": "unconnected",
"description": "No internal connection; shown as NC on the schematic."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Supply pin with a recommended range of 2 V to 18 V and an absolute maximum of 20 V; a 0.01 µF ceramic bypass to pin 5 is recommended, and a series resistor RCC is advised where dVCM/dt may be very large."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The pin-to-function mapping for pins 1-4 was reconstructed from the electrical specification (Pins 2; Pin 5 is labeled GND and Pin 6 is VO in the electrical specs, but the page 1 and page 3 extracted la; Input Voltage (Pins 2-3) VIN is listed in the absolute maximum table with only a minimum of -0.5 V; ",
"1/8 pins cited to the wrong page (name found elsewhere): ['2:DC+@p8']"
],
"pages_sent": 14,
"cost_usd": 0.0769,
"at": "2026-10-16T06:16:52"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603038658954489856",
"pages": 14,
"sha256": "0122d32590fa98ef",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
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"file": "hcpl-3700-000e.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "body on z = 0, through-hole leads below",
"extents_mm": [
7.874,
9.27,
6.98
],
"zmin_mm": -3.3,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "4a377a56a8d9e9c0b86c095ef9ecc1869ac19e7f5069a3247b294250bf4f235d",
"checked": "2026-10-16",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "hcpl-3700-000e-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "body on z = 0, through-hole leads below",
"extents_mm": [
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9.27,
6.98
],
"zmin_mm": -3.3,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "77301608b085bad5d87d0ee5f53ee5f94481b1d5795b29386b05c53e4f8b1ef8",
"checked": "2026-10-16",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
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}
}