component
HCPL-063N-500E
Public Made by Adomby adom
Broadcom AVAGO Logic Output Optoisolators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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HCPL-063N-500E
Broadcom AVAGO · Logic Output Optoisolators · SOP-8
HCPL-063N-500E from Broadcom AVAGO, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ANODE 1 | input | Anode of input LED channel 1; the input is HCMOS-compatible with recommended forward current IFH of 3.0 to 10 mA and low-level input voltage VFL of -3 to 0.8 V. |
| 2 | CATHODE 1 | input | Cathode of input LED channel 1, returned to the input-side ground of the drive circuit. |
| 3 | CATHODE 2 | input | Cathode of input LED channel 2, returned to the input-side ground of the drive circuit. |
| 4 | ANODE 2 | input | Anode of input LED channel 2; the input is HCMOS-compatible with recommended forward current IFH of 3.0 to 10 mA and low-level input voltage VFL of -3 to 0.8 V. |
| 5 | GND | power_in | Ground reference for the detector side; a 0.1 µF bypass capacitor between pins 5 and 8 is required, with total lead length not exceeding 10 mm. |
| 6 | VO2 | output | Open-collector Schottky-clamped output of channel 2 that requires an external pull-up resistor RL of 330 Ω to 4 kΩ; each channel is rated for 50 mA maximum collector current and 7 V maximum output voltage. |
| 7 | VO1 | output | Open-collector Schottky-clamped output of channel 1 that requires an external pull-up resistor RL of 330 Ω to 4 kΩ; each channel is rated for 50 mA maximum collector current and 7 V maximum output voltage. |
| 8 | VCC | power_in | Detector supply voltage, recommended 4.5 to 5.5 V with an absolute maximum of 7 V, decoupled to pin 5 with a 0.1 µF capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Broadcom AVAGO |
| Package | SOP-8 |
| Category | Optoisolators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High Level Output Current | IOH | 100 | µA | VCC = 5.5 V, VO = 5.5 V, VF = 0.8 V, VE = 2.0 V | 8 | ||
| Low Level Output Voltage (sinking) | VOL | 0.4 | 0.6 | V | VCC = 5.5 V, IOL = 13 mA, IF = 3.0 mA, VE = 2.0 V | 8 | |
| High Level Supply Current (dual channel) | ICCH | 9 | 15 | mA | VE = 0.5 V, VCC = 5.5 V | 8 | |
| Low Level Supply Current (dual channel) | ICCL | 12 | 21 | mA | VE = 0.5 V, VCC = 5.5 V | 8 | |
| Input Forward Voltage | VF | 1 | 1.3 | 1.6 | V | IF = 4 mA | 8 |
| Input Reverse Breakdown Voltage | BVR | 3 | 5 | V | IR = 100 µA | 8 | |
| Input Current Threshold, High to Low | ITHL | 1.5 | 3 | mA | VCC = 5.5 V, VO = 0.6 V, IO > 13 mA (sinking) | 9 | |
| Propagation Delay Time to High Output Level | tPLH | 52 | 100 | ns | IF = 3.5 mA, VCC = 5.0 V, VE = Open | 9 | |
| Propagation Delay Time to Low Output Level | tPHL | 53 | 100 | ns | VCC = 5.0 V, VE = Open | 9 | |
| Pulse Width Distortion /tPHL - tPLH/ | PWD | 11 | 45 | ns | 9 | ||
| Propagation Delay Skew | tPSK | 60 | ns | 9 | |||
| Output Rise Time | tR | 42 | ns | 9 | |||
| Output Fall Time | tF | 12 | ns | 9 | |||
| Output High Level Common Mode Transient Immunity (HCPL-063N) | /CMH/ | 15 | 25 | kV/µs | Using Avago App Circuit; VCC = 5.0 V, RL = 350 Ω, IF = 0 mA, TA = 25°C | 9 | |
| Output Low Level Common Mode Transient Immunity (HCPL-063N) | /CML/ | 15 | 25 | kV/µs | Using Avago App Circuit; VCC = 5.0 V, RL = 350 Ω, IF = 3.5 mA, VO(MAX) = 0.8 V | 9 | |
| Input-Output Momentary Withstand Voltage | VISO | 3750 | V rms | RH ≤ 50%, t = 1 min., TA = 25°C | 10 | ||
| Storage Temperature | TS | -55 | 125 | °C | 7 | ||
| Operating Temperature (absolute maximum) | TA | -40 | 85 | °C | 7 | ||
| Average Input Current | IF(AVG) | 10 | mA | Note 1 | 7 | ||
| Reverse Input Voltage | VR | 3 | V | 7 | |||
| Supply Voltage | VCC | -0.5 | 7 | V | Note 2 (1 minute maximum) | 7 | |
| Enable Input Voltage | VE | -0.5 | 5.5 | V | 7 | ||
| Output Collector Current (each channel) | IO | 50 | mA | 7 | |||
| Output Power Dissipation (each channel) | PO | 60 | mW | Note 3 | 7 | ||
| Output Voltage (each channel) | VO | -0.5 | 7 | V | 7 | ||
| Input Voltage, Low Level | VFL | -3 | 0.8 | V | 7 | ||
| Input Current, High Level | IFH | 3 | 10 | mA | 7 | ||
| Power Supply Voltage | VCC | 4.5 | 5.5 | V | 7 | ||
| High Level Enable Voltage | VEH | 2 | V | Max printed as VCC | 7 | ||
| Low Level Enable Voltage | VEL | 0 | 0.8 | V | 7 | ||
| Output Pull-up Resistor | RL | 330 | Ω | Max printed as 4k Ω; not converted | 7 | ||
| Operating Temperature (recommended) | TA | -40 | 85 | °C | 7 |
CAD (KiCad official)
- Symbol:
HCPL-063N-500E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
hcpl-063n-500e-etched.step/hcpl-063n-500e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hcpl-063n-500e.step/hcpl-063n-500e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Broadcom AVAGO datasheet (17 pp, sha256
8461476436e3d09a, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HCPL-063N-500E
**Broadcom AVAGO** · Logic Output Optoisolators · SOP-8
HCPL-063N-500E from Broadcom AVAGO, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ANODE 1 | input | Anode of input LED channel 1; the input is HCMOS-compatible with recommended forward current IFH of 3.0 to 10 mA and low-level input voltage VFL of -3 to 0.8 V. |
| 2 | CATHODE 1 | input | Cathode of input LED channel 1, returned to the input-side ground of the drive circuit. |
| 3 | CATHODE 2 | input | Cathode of input LED channel 2, returned to the input-side ground of the drive circuit. |
| 4 | ANODE 2 | input | Anode of input LED channel 2; the input is HCMOS-compatible with recommended forward current IFH of 3.0 to 10 mA and low-level input voltage VFL of -3 to 0.8 V. |
| 5 | GND | power_in | Ground reference for the detector side; a 0.1 µF bypass capacitor between pins 5 and 8 is required, with total lead length not exceeding 10 mm. |
| 6 | VO2 | output | Open-collector Schottky-clamped output of channel 2 that requires an external pull-up resistor RL of 330 Ω to 4 kΩ; each channel is rated for 50 mA maximum collector current and 7 V maximum output voltage. |
| 7 | VO1 | output | Open-collector Schottky-clamped output of channel 1 that requires an external pull-up resistor RL of 330 Ω to 4 kΩ; each channel is rated for 50 mA maximum collector current and 7 V maximum output voltage. |
| 8 | VCC | power_in | Detector supply voltage, recommended 4.5 to 5.5 V with an absolute maximum of 7 V, decoupled to pin 5 with a 0.1 µF capacitor. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Broadcom AVAGO |
| Package | SOP-8 |
| Category | Optoisolators |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High Level Output Current | IOH | | | 100 | µA | VCC = 5.5 V, VO = 5.5 V, VF = 0.8 V, VE = 2.0 V | 8 |
| Low Level Output Voltage (sinking) | VOL | | 0.4 | 0.6 | V | VCC = 5.5 V, IOL = 13 mA, IF = 3.0 mA, VE = 2.0 V | 8 |
| High Level Supply Current (dual channel) | ICCH | | 9 | 15 | mA | VE = 0.5 V, VCC = 5.5 V | 8 |
| Low Level Supply Current (dual channel) | ICCL | | 12 | 21 | mA | VE = 0.5 V, VCC = 5.5 V | 8 |
| Input Forward Voltage | VF | 1 | 1.3 | 1.6 | V | IF = 4 mA | 8 |
| Input Reverse Breakdown Voltage | BVR | 3 | 5 | | V | IR = 100 µA | 8 |
| Input Current Threshold, High to Low | ITHL | | 1.5 | 3 | mA | VCC = 5.5 V, VO = 0.6 V, IO > 13 mA (sinking) | 9 |
| Propagation Delay Time to High Output Level | tPLH | | 52 | 100 | ns | IF = 3.5 mA, VCC = 5.0 V, VE = Open | 9 |
| Propagation Delay Time to Low Output Level | tPHL | | 53 | 100 | ns | VCC = 5.0 V, VE = Open | 9 |
| Pulse Width Distortion /tPHL - tPLH/ | PWD | | 11 | 45 | ns | | 9 |
| Propagation Delay Skew | tPSK | | | 60 | ns | | 9 |
| Output Rise Time | tR | | | 42 | ns | | 9 |
| Output Fall Time | tF | | | 12 | ns | | 9 |
| Output High Level Common Mode Transient Immunity (HCPL-063N) | /CMH/ | 15 | 25 | | kV/µs | Using Avago App Circuit; VCC = 5.0 V, RL = 350 Ω, IF = 0 mA, TA = 25°C | 9 |
| Output Low Level Common Mode Transient Immunity (HCPL-063N) | /CML/ | 15 | 25 | | kV/µs | Using Avago App Circuit; VCC = 5.0 V, RL = 350 Ω, IF = 3.5 mA, VO(MAX) = 0.8 V | 9 |
| Input-Output Momentary Withstand Voltage | VISO | 3750 | | | V rms | RH ≤ 50%, t = 1 min., TA = 25°C | 10 |
| Storage Temperature | TS | -55 | | 125 | °C | | 7 |
| Operating Temperature (absolute maximum) | TA | -40 | | 85 | °C | | 7 |
| Average Input Current | IF(AVG) | | | 10 | mA | Note 1 | 7 |
| Reverse Input Voltage | VR | | | 3 | V | | 7 |
| Supply Voltage | VCC | -0.5 | | 7 | V | Note 2 (1 minute maximum) | 7 |
| Enable Input Voltage | VE | -0.5 | | 5.5 | V | | 7 |
| Output Collector Current (each channel) | IO | | | 50 | mA | | 7 |
| Output Power Dissipation (each channel) | PO | | | 60 | mW | Note 3 | 7 |
| Output Voltage (each channel) | VO | -0.5 | | 7 | V | | 7 |
| Input Voltage, Low Level | VFL | -3 | | 0.8 | V | | 7 |
| Input Current, High Level | IFH | 3 | | 10 | mA | | 7 |
| Power Supply Voltage | VCC | 4.5 | | 5.5 | V | | 7 |
| High Level Enable Voltage | VEH | 2 | | | V | Max printed as VCC | 7 |
| Low Level Enable Voltage | VEL | 0 | | 0.8 | V | | 7 |
| Output Pull-up Resistor | RL | 330 | | | Ω | Max printed as 4k Ω; not converted | 7 |
| Operating Temperature (recommended) | TA | -40 | | 85 | °C | | 7 |
## CAD (KiCad official)
- Symbol: `HCPL-063N-500E`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `hcpl-063n-500e-etched.step` / `hcpl-063n-500e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hcpl-063n-500e.step` / `hcpl-063n-500e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Broadcom AVAGO datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588916884750143488) (17 pp, sha256 `8461476436e3d09a`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/hcpl-063n-500e-datasheet.pdf)