# HCPL-0500-500E

**Broadcom AVAGO** · Logic Output Optoisolators · SO-8

HCPL-0500-500E from Broadcom AVAGO, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection; labeled NC in the functional diagram. |
| 2 | ANODE | input | LED anode; the absolute maximum average forward input current is 25 mA, peak forward current is 50 mA (50% duty cycle, 1 ms pulse), and reverse LED input voltage (pin 3-2) is 5 V for SO-8. |
| 3 | CATHODE | input | LED cathode; reverse LED input voltage (pin 3-2) is limited to 5 V for SO-8 devices. |
| 4 | NC | unconnected | No internal connection; labeled NC in the functional diagram. |
| 5 | GND | power_in | Ground and emitter reference for the output stage; emitter-base reverse voltage (pin 5-7) is limited to 5 V, and a 0.1-µF bypass capacitor must be connected between pins 5 and 8. |
| 6 | VO | output | Open-collector output; output voltage (pin 6-5) is limited to -0.5 V to 15 V for SO-8, average output current to 8 mA, and peak output current to 16 mA. |
| 7 | VB | power_in | Photodiode bias / transistor base connection; base current (pin 7) is limited to 5 mA maximum. |
| 8 | VCC | power_in | Positive supply referenced to pin 5; supply voltage (pin 8-5) is listed as -0.5 V to 15 V in the SO-8-relevant rating row, and a 0.1-µF bypass capacitor must be connected between pins 5 and 8. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Broadcom AVAGO |
| Package | SO-8 |
| Category | Optoisolators |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | TS | -55 |  | 125 | °C |  | 12 |
| Operating Temperature (SO-8) | TA | -55 |  | 100 | °C |  | 12 |
| Average Forward Input Current | IF(AVG) |  |  | 25 | mA |  | 12 |
| Peak Forward Input Current (SO-8) | IF(PEAK) |  |  | 50 | mA | 50% duty cycle, 1 ms pulse width | 12 |
| Peak Transient Input Current (SO-8) | IF(TRANS) |  |  | 1 | A | 1-µs pulse width, 300 pps | 12 |
| Reverse LED Input Voltage (Pin 3-2, SO-8) | VR |  |  | 5 | V |  | 12 |
| Input Power Dissipation (SO-8) | PIN |  |  | 45 | mW |  | 12 |
| Average Output Current (Pin 6) | IO(AVG) |  |  | 8 | mA |  | 12 |
| Peak Output Current | IO(PEAK) |  |  | 16 | mA |  | 12 |
| Emitter-Base Reverse Voltage (Pin 5-7) | VEBR |  |  | 5 | V |  | 12 |
| Supply Voltage (Pin 8-5) | VCC | -0.5 |  | 30 | V |  | 12 |
| Output Voltage (Pin 6-5) | VO | -0.5 |  | 20 | V |  | 12 |
| Supply Voltage (Pin 8-5), second rating | VCC | -0.5 |  | 15 | V |  | 12 |
| Output Voltage (Pin 6-5), second rating | VO | -0.5 |  | 15 | V |  | 12 |
| Base Current (Pin 7) | IB |  |  | 5 | mA |  | 12 |
| Output Power Dissipation | PO |  |  | 100 | mW |  | 12 |
| Current Transfer Ratio | CTR | 7 | 18 | 50 | % | TA = 25°C VO = 0.4V IF = 16 mA, VCC = 4.5V | 13 |
| Current Transfer Ratio | CTR | 5 | 19 |  | % | VO = 0.5V | 13 |
| Logic Low Output Voltage | VOL |  | 0.1 | 0.4 | V | TA = 25°C IO = 1.1 mA IF = 16 mA, VCC = 4.5V | 13 |
| Logic Low Output Voltage | VOL |  | 0.1 | 0.5 | V | IO = 0.8 mA, VCC = 4.5V | 13 |
| Logic High Output Current | IOH |  | 0.003 | 0.5 | µA | TA = 25°C VO = VCC = 5.5V IF = 0 mA | 13 |
| Logic High Output Current | IOH |  | 0.01 | 1 | µA | TA = 25°C VO = VCC = 15V | 13 |
| Logic High Output Current | IOH |  |  | 50 | µA | VO = VCC = 15V | 13 |
| Logic Low Supply Current | ICCL |  | 50 | 200 | µA | IF = 16 mA, VO = Open, VCC = 15V | 13 |
| Logic High Supply Current | ICCH |  | 0.02 | 1 | µA | TA = 25°C IF = 0 mA, VO = Open | 13 |
| Logic High Supply Current | ICCH |  |  | 2 | µA | VCC = 15V | 13 |
| Input Forward Voltage (SO-8) | VF |  |  | 1.8 | V | TA = 25°C IF = 16 mA | 13 |
| Propagation Delay Time to Logic Low at Output | tPHL |  | 0.2 | 1.5 | µs | TA = 25°C RL = 4.1 k | 15 |
| Propagation Delay Time to Logic High at Output | tPLH |  | 1.3 | 1.5 | µs | TA = 25°C RL = 4.1 k | 15 |
| Propagation Delay Time to Logic High at Output | tPLH |  |  | 2 | µs |  | 15 |
| Input-Output Momentary Withstand Voltage (SO-8) | VISO | 3750 |  |  | Vrms | RH < 50%, t = 1 min., TA = 25°C | 16 |

## CAD (KiCad official)

- Symbol: `HCPL-0500-500E`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `hcpl-0500-500e-etched.step` / `hcpl-0500-500e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hcpl-0500-500e.step` / `hcpl-0500-500e.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Broadcom AVAGO datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590208192199090176) (22 pp, sha256 `a2426000a96f91c1`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/hcpl-0500-500e-datasheet.pdf)