component

HCPL-0466-500E

Public Made by Adom

by adom

Broadcom AVAGO Logic Output Optoisolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentoptoisolatorshcpl-0466-500efactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
hcpl-0466-500e / README.md
History Download
Ray Publish 0.1.0 c3fbd97 5h ago

HCPL-0466-500E

Broadcom AVAGO · Logic Output Optoisolators · SOIC-8

HCPL-0466-500E from Broadcom AVAGO, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection; the datasheet advises tying pin 1 to input circuit common if CMR is limited by LED current perturbation, or leaving it unconnected if CMR is limited by direct coupling to the output while the LED is off.
2 ANODE input LED anode input; with pin 3 it sets the LED forward current, recommended IF(on) 10 mA to 20 mA and VF(off) -5 V to 0.8 V.
3 CATHODE input LED cathode input; reverse input voltage (pin 3-2) is rated 5 V maximum for HCPL-0466, and average input current is limited to 25 mA.
4 NC unconnected No internal connection; same connection guidance as pin 1 (tie to input circuit common or leave unconnected depending on the CMR limiting mechanism).
5 GND power_in Detector ground reference for the output and supply; the datasheet specifies a 0.1 µF bypass capacitor between pins 5 and 8, and output and supply voltages are rated relative to this pin.
6 VO output Open-collector-style output referenced to pin 5, rated -0.5 V to 30 V with average output current limited to 15 mA; shorting pins 6 and 7 enables the on-chip 20 kΩ pull-up.
7 VL passive Connection to the internal 20 kΩ pull-up resistor (14 kΩ to 25 kΩ) to VCC, rated -0.5 V to VCC; short to pin 6 to use the internal pull-up, otherwise an external pull-up may be used.
8 VCC power_in Detector supply voltage, recommended 4.5 V to 30 V, absolute maximum 30 V relative to pin 5; a 0.1 µF bypass capacitor to pin 5 is recommended.

Key specifications

Parameter Value
Manufacturer Broadcom AVAGO
Package SOIC-8
Category Optoisolators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Current Transfer Ratio CTR 44 90 % IF = 10 mA, VO = 0.6 V 12
Low Level Output Current IOL 4.4 9 mA IF = 10 mA, VO = 0.6 V 12
Low Level Output Voltage VOL 0.3 0.6 V IO = 2.4 mA 12
High Level Output Current IOH 5 50 µA VF = 0.8 V 12
High Level Supply Current ICCH 0.6 1.3 mA VF = 0.8 V, VO = Open 12
Low Level Supply Current ICCL 0.6 1.3 mA IF = 10 mA, VO = Open 12
Internal Pull-up Resistor RL 14 20 25 kΩ TA = 25°C 12
Propagation Delay Time to Logic Low at Output (internal RL) tPHL 20 200 400 ns IF(on) = 10 mA, VF(off) = 0.8 V, VCC = 15.0 V, CL = 100 pF, VTHLH = 2.0 V, VTHHL = 1.5 V 13
Propagation Delay Time to High Output Level (internal RL) tPLH 220 450 650 ns 13
Pulse Width Distortion (internal RL) PWD 250 500 ns 13
Propagation Delay Difference Between Any 2 Parts (internal RL) tPLH-tPHL -150 250 500 ns 13
Propagation Delay Time to Logic Low at Output (external 20 kΩ RL) TPHL 30 200 400 ns CL = 100 pF, IF(on) = 10 mA, VF(off) = 0.8 V, VCC = 15.0 V 13
Propagation Delay Time to High Output Level (external 20 kΩ RL) TPLH 270 400 550 ns CL = 100 pF, VTHLH = 2.0 V, VTHHL = 1.5 V 13
Pulse Width Distortion (external 20 kΩ RL) PWD 200 450 ns CL = 100 pF 13
Propagation Delay Difference Between Any 2 Parts (external 20 kΩ RL) tPLH-tPHL -150 200 450 ns 13
Output High Level Common Mode Transient Immunity /CMH/ 15 30 kV/µs IF = 0 mA, VCC = 15.0 V, VO > 3.0 V, CL = 100 pF, VCM = 1500 Vp-p 13
Output Low Level Common Mode Transient Immunity /CML/ 15 30 kV/µs IF = 10 mA, TA = 25°C, VO < 1.0 V 13
Input-Output Momentary Withstand Voltage VISO 3750 V rms t = 1 min. 14
Storage Temperature TS -55 125 °C 11
Operating Temperature TA -40 100 °C 11
Average Input Current IF(avg) 25 mA Derate linearly above 90°C free-air temperature at 0.8 mA/°C 11
Peak Input Current IF(peak) 50 mA 50% duty cycle, ≤1 ms pulse width 11
Peak Transient Input Current IF(tran) 1 A <1 µs pulse width, 300 pps 11
Reverse Input Voltage (HCPL-4506, HCPL-0466) VR 5 Volts Pin 3-2 11
Average Output Current IO(avg) 15 mA Pin 6 11
Resistor Voltage V7 -0.5 Volts Pin 7; upper limit printed as VCC 11
Output Voltage VO -0.5 30 Volts Pin 6-5 11
Supply Voltage VCC -0.5 30 Volts Pin 8-5 11
Output Power Dissipation PO 100 mW Derate linearly above 90°C free-air temperature at 3.0 mW/°C 11
Total Power Dissipation PT 145 mW Derate linearly above 90°C free-air temperature at 4.2 mW/°C 11
Power Supply Voltage VCC 4.5 30 Volts 11
Output Voltage VO 0 30 Volts 11
Input Current (ON) IF(on) 10 20 mA 11
Input Voltage (OFF) VF(off) -5 0.8 V 11
Operating Temperature TA -40 100 °C 11
Internal Pull-up Resistor Temperature Coefficient ∆RL/∆TA 0.014 kΩ/°C 12

CAD (KiCad official)

  • Symbol: HCPL-0466-500E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: hcpl-0466-500e-etched.step / hcpl-0466-500e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hcpl-0466-500e.step / hcpl-0466-500e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Broadcom AVAGO datasheet (21 pp, sha256 fffe9469b2ecde73, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF