component
HCPL-0454-500E
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Broadcom AVAGO Logic Output Optoisolators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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HCPL-0454-500E
Broadcom AVAGO · Logic Output Optoisolators · SOP-8
HCPL-0454-500E from Broadcom AVAGO, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not connected (NC) on the functional diagram; no connection is specified for this pin. |
| 2 | ANODE | passive | Anode of the input GaAsP LED; the input is referenced to pin 3 (CATHODE), with an average forward input current limit of 25 mA. |
| 3 | CATHODE | passive | Cathode of the input LED; reverse LED input voltage (pin 3-2) is rated at 5 V maximum for HCPL-0454. |
| 4 | NC | unconnected | Not connected (NC) on the functional diagram; no connection is specified for this pin. |
| 5 | GND | power_in | Ground reference for the output stage and supply (pin 8-5 and pin 6-5 ratings are referenced to this pin); a 0.1 µF bypass capacitor between pins 5 and 8 is recommended. |
| 6 | VO | output | Open-collector TTL-compatible output; output voltage (pin 6-5) is limited to -0.5 V to 20 V and average output current to 8 mA. |
| 7 | NC | unconnected | Not connected (NC) on the functional diagram; no connection is specified for this pin. |
| 8 | VCC | power_in | Supply voltage pin (pin 8-5), rated -0.5 V to 30 V; a 0.1 µF bypass capacitor to pin 5 is recommended. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Broadcom AVAGO |
| Package | SOP-8 |
| Category | Optoisolators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | TS | -55 | 125 | °C | 10 | ||
| Operating Temperature (HCPL-0454 row) | TA | -55 | 100 | °C | 10 | ||
| Average Forward Input Current | IF(AVG) | 25 | mA | 10 | |||
| Peak Forward Input Current (HCPL-0454) | IF(PEAK) | 50 | mA | 50% duty cycle, 1 ms pulse width | 10 | ||
| Peak Transient Input Current (HCPL-0454) | IF(TRANS) | 1 | A | ≤1 µs pulse width, 300 pps | 10 | ||
| Reverse LED Input Voltage (Pin 3-2) | VR | 5 | V | 10 | |||
| Input Power Dissipation (HCPL-0454) | PIN | 45 | mW | 10 | |||
| Average Output Current (Pin 6) | IO(AVG) | 8 | mA | 10 | |||
| Peak Output Current | IO(PEAK) | 16 | mA | 10 | |||
| Supply Voltage (Pin 8-5) | VCC | -0.5 | 30 | V | 10 | ||
| Output Voltage (Pin 6-5) | VO | -0.5 | 20 | V | 10 | ||
| Output Power Dissipation | PO | 100 | mW | 10 | |||
| Recommended temperature range | TA | 0 | 70 | °C | Over recommended temperature (TA = 0°C to 70°C) unless otherwise specified | 11 | |
| Current Transfer Ratio (VO=0.4 V, IF=16 mA) | CTR | 25 | 32 | 60 | % | TA = 25°C, VO = 0.4 V, IF = 16 mA, VCC = 4.5 V | 11 |
| Current Transfer Ratio (VO=0.5 V, IF=16 mA) | CTR | 21 | 34 | % | VO = 0.5 V, IF = 16 mA, VCC = 4.5 V | 11 | |
| Current Transfer Ratio (VO=0.4 V, IF=12 mA) | CTR | 26 | 35 | 65 | % | TA = 25°C, VO = 0.4 V, IF = 12 mA, VCC = 4.5 V | 11 |
| Current Transfer Ratio (VO=0.5 V, IF=12 mA) | CTR | 22 | 37 | % | VO = 0.5 V, IF = 12 mA, VCC = 4.5 V | 11 | |
| Logic Low Output Voltage (IO=4.0 mA) | VOL | 0.2 | 0.4 | V | TA = 25°C, IO = 4.0 mA, IF = 16 mA, VCC = 4.5 V | 11 | |
| Logic Low Output Voltage (IO=3.3 mA) | VOL | 0.5 | V | IO = 3.3 mA, IF = 16 mA, VCC = 4.5 V | 11 | ||
| Logic High Output Current (VO=VCC=5.5 V) | IOH | 0.003 | 0.5 | µA | TA = 25°C, VO = VCC = 5.5 V, IF = 0 mA | 11 | |
| Logic High Output Current (VO=VCC=15 V) | IOH | 0.01 | 1 | µA | TA = 25°C, VO = VCC = 15 V | 11 | |
| Logic High Output Current (second max value) | IOH | 50 | µA | 11 | |||
| Logic Low Supply Current | ICCL | 50 | 200 | µA | IF = 16 mA, VO = Open, VCC = 15 V | 11 | |
| Logic High Supply Current (25°C) | ICCH | 0.02 | 1 | µA | TA = 25°C, IF = 0 mA, VO = Open, VCC = 15 V | 11 | |
| Logic High Supply Current (second max value) | ICCH | 2 | µA | IF = 0 mA, VO = Open, VCC = 15 V | 11 | ||
| Input Forward Voltage (25°C) | VF | 1.5 | 1.7 | V | TA = 25°C, IF = 16 mA | 11 | |
| Input Forward Voltage (second max value) | VF | 1.8 | V | IF = 16 mA | 11 | ||
| Input Reverse Breakdown Voltage | BVR | 5 | V | IR = 10 µA | 11 | ||
| Propagation Delay Time to Logic Low at Output (TTL, 25°C) | tPHL | 0.2 | 0.3 | µs | TA = 25°C, Pulse f = 20 kHz, Duty Cycle = 10%, IF = 16 mA, VCC = 5.0 V, RL = 1.9 kΩ, CL = 15 pF, VTHHL = 1.5 V | 12 | |
| Propagation Delay Time to Logic Low at Output (TTL, 0-70°C) | tPHL | 0.2 | 0.5 | µs | TA = 0°C to 70°C, Pulse f = 20 kHz, Duty Cycle = 10%, IF = 16 mA, VCC = 5.0 V, RL = 1.9 kΩ, CL = 15 pF, VTHHL = 1.5 V | 12 | |
| Propagation Delay Time to Logic Low at Output (IPM) | tPHL | 0.2 | 0.5 | 0.7 | µs | TA = 25°C, Pulse f = 10 kHz, Duty Cycle = 50%, IF = 12 mA, VCC = 15.0 V, RL = 20 kΩ, CL = 100 pF, VTHHL = 1.5 V | 12 |
| Propagation Delay Time to Logic High at Output (TTL, 25°C) | tPLH | 0.3 | 0.5 | µs | TA = 25°C, Pulse f = 20 kHz, Duty Cycle = 10%, IF = 16 mA, VCC = 5.0 V, RL = 1.9 kΩ, CL = 15 pF, VTHLH = 1.5 V | 12 | |
| Propagation Delay Time to Logic High at Output (TTL, 0-70°C) | tPLH | 0.3 | 0.7 | µs | TA = 0°C to 70°C, Pulse f = 20 kHz, Duty Cycle = 10%, IF = 16 mA, VCC = 5.0 V, RL = 1.9 kΩ, CL = 15 pF, VTHLH = 1.5 V | 12 | |
| Propagation Delay Time to Logic High at Output (IPM, 25°C) | tPLH | 0.3 | 0.8 | 1.1 | µs | TA = 25°C, Pulse f = 10 kHz, Duty Cycle = 50%, IF = 12 mA, VCC = 15.0 V, RL = 20 kΩ, CL = 100 pF, VTHLH = 2.0 V | 12 |
| Propagation Delay Time to Logic High at Output (IPM, 0-70°C) | tPLH | 0.2 | 0.8 | 1.4 | µs | TA = 0°C to 70°C, Pulse f = 10 kHz, Duty Cycle = 50%, IF = 12 mA, VCC = 15.0 V, RL = 20 kΩ, CL = 100 pF, VTHLH = 2.0 V | 12 |
| Propagation Delay Difference Between Any 2 Parts (25°C) | tPLH-tPHL | -0.4 | 0.3 | 0.9 | µs | TA = 25°C, Pulse f = 10 kHz, Duty Cycle = 50%, IF = 12 mA, VCC = 15.0 V, RL = 20 kΩ, CL = 100 pF, VTHHL = 1.5 V, VTHLH = 2.0 V | 12 |
| Propagation Delay Difference Between Any 2 Parts (0-70°C) | tPLH-tPHL | -0.7 | 0.3 | 1.3 | µs | TA = 0°C to 70°C, Pulse f = 10 kHz, Duty Cycle = 50%, IF = 12 mA, VCC = 15.0 V, RL = 20 kΩ, CL = 100 pF, VTHHL = 1.5 V, VTHLH = 2.0 V | 12 |
| Common Mode Transient Immunity at Logic High (TTL) | /CMH/ | 15 | 30 | kV/µs | TA = 25°C, VCM = 1500 VP-P, VCC = 5.0 V, RL = 1.9 kΩ, CL = 15 pF, IF = 0 mA | 12 | |
| Common Mode Transient Immunity at Logic High (IPM) | /CMH/ | 15 | 30 | kV/µs | VCC = 15.0 V, RL = 20 kΩ, CL = 100 pF, IF = 0 mA | 12 | |
| Common Mode Transient Immunity at Logic Low (TTL) | /CML/ | 15 | 30 | kV/µs | TA = 25°C, VCM = 1500 VP-P, VCC = 5.0 V, RL = 1.9 kΩ, CL = 15 pF, IF = 16 mA | 12 | |
| Common Mode Transient Immunity at Logic Low (IPM) | /CML/ | 15 | 30 | kV/µs | VCC = 15.0 V, RL = 20 kΩ, CL = 100 pF, IF = 16 mA | 12 | |
| Input-Output Momentary Withstand Voltage | VISO | 3750 | V rms | RH ≤50%, t = 1 min., TA = 25°C | 13 |
CAD (KiCad official)
- Symbol:
HCPL-0454-500E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
hcpl-0454-500e-etched.step/hcpl-0454-500e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hcpl-0454-500e.step/hcpl-0454-500e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Broadcom AVAGO datasheet (19 pp, sha256
168cdc45b6488608, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).