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HCPL-0300-500E

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Broadcom AVAGO Logic Output Optoisolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HCPL-0300-500E

Broadcom AVAGO · Logic Output Optoisolators · SOIC-8

HCPL-0300-500E from Broadcom AVAGO, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection, as shown in the functional diagram.
2 ANODE passive Anode of the 820 nm AlGaAs input LED; the datasheet advises keeping LED forward voltage below 0.8 V to guarantee the output is off, with IFH of 0.5 to 1.0 mA and a 5 mA maximum average forward current.
3 CATHODE passive Cathode of the input LED; reverse input voltage is limited to 3.0 V.
4 NC unconnected No internal connection, as shown in the functional diagram.
5 GND power_in Ground reference for the detector circuit; a 0.1 µF bypass capacitor is required between pins 5 and 8.
6 VOUT output Open-collector Schottky-clamped output with an optional integrated 1000 Ω pull-up; output collector voltage is limited to -0.5 V to 18 V and output collector current to ±25 mA.
7 RL passive Connection to the internal 1000 Ω pull-up resistor (680 to 1700 Ω) for the open-collector output; absolute maximum pull-up resistor voltage is -0.5 V to VCC.
8 VCC power_in Supply voltage, 4.75 V to 5.25 V recommended and 7.0 V absolute maximum; bypass with a 0.1 µF ceramic capacitor between pins 5 and 8.

Key specifications

Parameter Value
Manufacturer Broadcom AVAGO
Package SOIC-8
Category Optoisolators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage Temperature TS -55 125 °C 6
Operating Temperature TA -40 85 °C 6
Lead Solder Temperature 260 °C 1.6 mm below seating plane, 10 s max 6
Average Forward Input Current IF 5 mA Note 2 (peaking transients up to 100 mA, 500 ns max, allowed if average does not exceed 5 mA) 6
Reverse Input Voltage VR 3 V 6
Supply Voltage VCC 0 7 V 6
Pull-Up Resistor Voltage VRL -0.5 V Upper limit printed as VCC 6
Output Collector Current IO -25 25 mA 6
Input Power Dissipation PI 10 mW 6
Output Collector Power Dissipation PO 40 mW 6
Output Collector Voltage VO -0.5 18 V 6
Input Voltage, Low Level VFL -2.5 0.8 V 7
Input Current High Level IFH 0.5 1 mA 0°C to 85°C 7
Input Current High Level IFH 0.5 0.75 mA -40°C to 85°C 7
Supply Voltage, Output VCC 4.75 5.25 V 7
Operating Temperature TA -40 85 °C 7
Propagation Delay Time (low-to-high output) tPLH 85 160 ns CP = 20 pF 7
Propagation Delay Time (high-to-low output) tPHL 35 200 ns CP = 20 pF 7
Common Mode Transient Immunity at High Output Level /CMH/ 100 400 V/µs VCM = 50 V (peak), VO (min.) = 2 V, RL = 560 Ω, IF = 0 mA 7
Common Mode Transient Immunity at Low Output Level /CML/ 100 400 V/µs VCM = 50 V (peak), VO (max.) = 0.8 V, RL = 560 Ω, IF = 0.5 mA 7
High Level Output Current IOH 0.05 250 µA VF = 0.8 V, VO = 18 V 7
Low Level Output Voltage VOL 0.4 0.5 V IF = 0.5 mA; IOL (sinking) = 8 mA 7
High Level Supply Current ICCH 4 6.3 mA IF = 0 mA, VCC = 5.25 V 7
Low Level Supply Current ICCL 6.2 10 mA IF = 1.0 mA, VCC = 5.25 V 7
Input Forward Voltage VF 1 1.3 1.5 V TA = 25°C, IF = 1.0 mA 7
Input Forward Voltage VF 0.85 1.65 V 7
Input Reverse Breakdown Voltage BVR 3 V IR = 10 µA 7
Internal Pull-up Resistor RL 680 1000 1700 Ω TA = 25°C 7
Input-Output Momentary Withstand Voltage VISO 3750 V rms RH ≤ 50%, t = 1 min, TA = 25°C 8
Input Diode Temperature Coefficient ΔVF/ΔTA -1.6 mV/°C IF = 1.0 mA 7
Input Capacitance CIN 18 pF VF = 0 V, f = 1 MHz 7
Capacitance, Input-Output CI-O 0.6 pF f = 1 MHz 8
Propagation Delay Time (low-to-high output) tPLH 95 ns CP = 0 pF 7
Propagation Delay Time (high-to-low output) tPHL 110 ns CP = 0 pF 7
Output Rise Time (10-90%) tr 40 ns CP = 20 pF 7
Output Fall Time (90-10%) tf 20 ns 7

CAD (KiCad official)

  • Symbol: HCPL-0300-500E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: hcpl-0300-500e-etched.step / hcpl-0300-500e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hcpl-0300-500e.step / hcpl-0300-500e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Broadcom AVAGO datasheet (15 pp, sha256 7986e1fac4ed6ba2, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF