component
HCOS4426SR
Public Made by Adomby adom
HXY MOSFET Gate Drivers, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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HCOS4426SR
HXY MOSFET · Gate Drivers · SOP-8
HCOS4426SR from HXY MOSFET, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Marked as an empty (no-connect) pin in the datasheet pin table; the datasheet advises tying unused pins to VCC or GND in noisy environments. |
| 2 | INA | input | Channel A input with logic thresholds of VIH 2.4 V minimum and VIL 0.8 V maximum, and it tolerates -10 V to VCC+0.3 V absolute input voltage. |
| 3 | GND | power_in | Ground reference for all voltage parameters; the device tolerates noise spikes up to 5 V of either polarity on the ground pin without damage. |
| 4 | INB | input | Channel B input with logic thresholds of VIH 2.4 V minimum and VIL 0.8 V maximum, and it tolerates -10 V to VCC+0.3 V absolute input voltage. |
| 5 | OUTB | output | Channel B output, inverting with respect to INB, able to source or sink 2 A peak current to drive a P- or N-type MOSFET gate. |
| 6 | VCC | power_in | Supply pin with recommended operating range 4.5 V to 20 V and absolute maximum of 25 V, referenced to GND. |
| 7 | OUTA | output | Channel A output, inverting with respect to INA, able to source or sink 2 A peak current to drive a P- or N-type MOSFET gate. |
| 8 | NC | unconnected | Marked as an empty (no-connect) pin in the datasheet pin table; the datasheet advises tying unused pins to VCC or GND in noisy environments. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HXY MOSFET |
| Package | SOP-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage (absolute maximum) | VCC | 25 | V | 3 | |||
| Logic input voltage (INA/INB) | VIN | -10 | V | 3 | |||
| ESD human body model | 2000 | V | 3 | ||||
| ESD machine model | 500 | V | 3 | ||||
| SOIC package power dissipation | PD | 470 | mW | TA ≤ 70°C | 3 | ||
| Junction temperature | TJ | 150 | °C | 3 | |||
| Storage temperature | TS | -45 | 150 | °C | 3 | ||
| Supply voltage (recommended) | VCC | 4.5 | 20 | V | 3 | ||
| Ambient temperature (recommended) | TC | -40 | 125 | °C | 3 | ||
| Logic high input voltage | VIH | 2.4 | V | TA=25℃, 4.5V≤VCC≤18V | 4 | ||
| Logic low input voltage | VIL | 0.8 | V | TA=25℃, 4.5V≤VCC≤18V | 4 | ||
| Input current | IIN | 0 | 20 | μA | 0V≤VIN≤VCC | 4 | |
| Low-level output voltage drop | VOL | 0.025 | V | TA=25℃, 4.5V≤VCC≤18V | 4 | ||
| High-state output resistance | ROH | 4 | 8 | Ω | VCC=18V, IO=100mA | 4 | |
| Low-state output resistance | ROL | 2 | 4 | Ω | VCC=18V, IO=100mA | 4 | |
| Latch-up protection reverse current withstand | IREV | 0.5 | A | duty cycle ≤2%, t≤300us, VCC=18V | 4 | ||
| Quiescent supply current (VINA=VINB=logic high) | IQ1 | 1 | mA | VINA=VINB=logic high | 4 | ||
| Quiescent supply current (VINA=VINB=logic low) | IQ0 | 1 | mA | VINA=VINB=logic low | 4 | ||
| Peak output current | IPK | 2 | A | 4 | |||
| Rise time | tR | 30 | ns | VCC=18V, CLOAD=100pF | 4 | ||
| Fall time | tF | 30 | ns | VCC=18V, CLOAD=100pF | 4 | ||
| Turn-on propagation delay | tON | 70 | ns | VCC=18V, CLOAD=100pF | 4 | ||
| Turn-off propagation delay | tOFF | 70 | ns | VCC=18V, CLOAD=100pF | 4 |
CAD (KiCad official)
- Symbol:
HCOS4426SR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
hcos4426sr-etched.step/hcos4426sr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hcos4426sr.step/hcos4426sr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HXY MOSFET datasheet (8 pp, sha256
3fd731bc2d5125c5, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HCOS4426SR
**HXY MOSFET** · Gate Drivers · SOP-8
HCOS4426SR from HXY MOSFET, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Marked as an empty (no-connect) pin in the datasheet pin table; the datasheet advises tying unused pins to VCC or GND in noisy environments. |
| 2 | INA | input | Channel A input with logic thresholds of VIH 2.4 V minimum and VIL 0.8 V maximum, and it tolerates -10 V to VCC+0.3 V absolute input voltage. |
| 3 | GND | power_in | Ground reference for all voltage parameters; the device tolerates noise spikes up to 5 V of either polarity on the ground pin without damage. |
| 4 | INB | input | Channel B input with logic thresholds of VIH 2.4 V minimum and VIL 0.8 V maximum, and it tolerates -10 V to VCC+0.3 V absolute input voltage. |
| 5 | OUTB | output | Channel B output, inverting with respect to INB, able to source or sink 2 A peak current to drive a P- or N-type MOSFET gate. |
| 6 | VCC | power_in | Supply pin with recommended operating range 4.5 V to 20 V and absolute maximum of 25 V, referenced to GND. |
| 7 | OUTA | output | Channel A output, inverting with respect to INA, able to source or sink 2 A peak current to drive a P- or N-type MOSFET gate. |
| 8 | NC | unconnected | Marked as an empty (no-connect) pin in the datasheet pin table; the datasheet advises tying unused pins to VCC or GND in noisy environments. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HXY MOSFET |
| Package | SOP-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage (absolute maximum) | VCC | | | 25 | V | | 3 |
| Logic input voltage (INA/INB) | VIN | -10 | | | V | | 3 |
| ESD human body model | | | | 2000 | V | | 3 |
| ESD machine model | | | | 500 | V | | 3 |
| SOIC package power dissipation | PD | | | 470 | mW | TA ≤ 70°C | 3 |
| Junction temperature | TJ | | | 150 | °C | | 3 |
| Storage temperature | TS | -45 | | 150 | °C | | 3 |
| Supply voltage (recommended) | VCC | 4.5 | | 20 | V | | 3 |
| Ambient temperature (recommended) | TC | -40 | | 125 | °C | | 3 |
| Logic high input voltage | VIH | 2.4 | | | V | TA=25℃, 4.5V≤VCC≤18V | 4 |
| Logic low input voltage | VIL | | | 0.8 | V | TA=25℃, 4.5V≤VCC≤18V | 4 |
| Input current | IIN | 0 | | 20 | μA | 0V≤VIN≤VCC | 4 |
| Low-level output voltage drop | VOL | | | 0.025 | V | TA=25℃, 4.5V≤VCC≤18V | 4 |
| High-state output resistance | ROH | | 4 | 8 | Ω | VCC=18V, IO=100mA | 4 |
| Low-state output resistance | ROL | | 2 | 4 | Ω | VCC=18V, IO=100mA | 4 |
| Latch-up protection reverse current withstand | IREV | 0.5 | | | A | duty cycle ≤2%, t≤300us, VCC=18V | 4 |
| Quiescent supply current (VINA=VINB=logic high) | IQ1 | | | 1 | mA | VINA=VINB=logic high | 4 |
| Quiescent supply current (VINA=VINB=logic low) | IQ0 | | | 1 | mA | VINA=VINB=logic low | 4 |
| Peak output current | IPK | | 2 | | A | | 4 |
| Rise time | tR | | 30 | | ns | VCC=18V, CLOAD=100pF | 4 |
| Fall time | tF | | 30 | | ns | VCC=18V, CLOAD=100pF | 4 |
| Turn-on propagation delay | tON | | 70 | | ns | VCC=18V, CLOAD=100pF | 4 |
| Turn-off propagation delay | tOFF | | 70 | | ns | VCC=18V, CLOAD=100pF | 4 |
## CAD (KiCad official)
- Symbol: `HCOS4426SR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `hcos4426sr-etched.step` / `hcos4426sr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hcos4426sr.step` / `hcos4426sr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HXY MOSFET datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603010711509614592) (8 pp, sha256 `3fd731bc2d5125c5`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/hcos4426sr-datasheet.pdf)