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HCNW4506-000E

Broadcom AVAGO · Logic Output Optoisolators · DIP-8

HCNW4506-000E from Broadcom AVAGO, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection; the datasheet says pins 1 and 4 should go to input circuit common if CMR is limited by LED current perturbations, or be left unconnected if CMR is limited by direct coupling to the output when the LED is off.
2 ANODE input LED anode input; the reverse input voltage is measured from pin 3 to pin 2 and the LED average input current is limited to 25 mA.
3 CATHODE input LED cathode input; the input reverse breakdown limit is 3 V for HCNW4506, and the recommended VF(OFF) is -3 V to 0.8 V for this part.
4 NC unconnected No internal connection; leave unconnected or connect to input circuit common depending on the CMR layout considerations described in the datasheet.
5 GND power_in Output and supply ground reference; the output voltage (pin 6-5) and supply voltage (pin 8-5) are referenced to this pin, and a 0.1 µF bypass capacitor is recommended between pins 5 and 8.
6 VO output Open-collector style detector output with a maximum output voltage of 30 V (pin 6-5) and average output current of 15 mA; shorting pins 6 and 7 enables the on-chip 20 kΩ pull-up resistor.
7 VL passive Internal 20 kΩ pull-up resistor terminal, with resistor voltage limited to -0.5 V to VCC; short to pin 6 to use the internal pull-up.
8 VCC power_in Detector supply pin with a recommended operating range of 4.5 V to 30 V (absolute maximum 30 V, pin 8-5), decoupled with a 0.1 µF capacitor to pin 5.

Key specifications

Parameter Value
Manufacturer Broadcom AVAGO
Package DIP-8
Category Optoisolators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage Temperature TS -55 125 °C 11
Operating Temperature TA -40 100 °C 11
Average Input Current IF(avg) 25 mA 11
Peak Input Current IF(peak) 50 mA 50% duty cycle, ≤1 ms pulse width 11
Peak Transient Input Current IF(tran) 1 A <1 µs pulse width, 300 pps 11
Reverse Input Voltage (Pin 3-2), HCNW4506 VR 3 Volts HCPL-J456, HCNW4506 11
Average Output Current (Pin 6) IO(avg) 15 mA 11
Resistor Voltage (Pin 7) V7 -0.5 Volts Maximum printed as VCC 11
Output Voltage (Pin 6-5) VO -0.5 30 Volts 11
Supply Voltage (Pin 8-5) VCC -0.5 30 Volts 11
Output Power Dissipation PO 100 mW 11
Total Power Dissipation PT 145 mW 11
Lead Solder Temperature (HCNW4506) 260 °C 10 s (up to seating plane) 11
Power Supply Voltage VCC 4.5 30 Volts 11
Output Voltage VO 0 30 Volts 11
Input Current (ON) IF(on) 10 20 mA 11
Input Voltage (OFF), HCNW4506 VF(off) -3 0.8 V Footnote: recommended VF(OFF) = -3 V to 0.8 V for HCNW4506 11
Operating Temperature (recommended) TA -40 100 °C 11
Internal Pull-up Resistor RL 14 20 25 kΩ TA = 25°C 12
Current Transfer Ratio CTR 44 90 % IF = 10 mA, VO = 0.6 V 12
Low Level Output Current IOL 4.4 9 mA IF = 10 mA, VO = 0.6 V 12
Low Level Output Voltage VOL 0.3 0.6 V IO = 2.4 mA 12
High Level Output Current IOH 5 50 µA VF = 0.8 V 12
High Level Supply Current ICCH 0.6 1.3 mA VF = 0.8 V, VO = Open 12
Low Level Supply Current ICCL 0.6 1.3 mA IF = 10 mA, VO = Open 12
Input Forward Voltage, HCNW4506 VF 1.6 1.85 V IF = 10 mA 12
Temperature Coefficient of Forward Voltage, HCNW4506 ∆VF/∆TA -1.3 mV/°C IF = 10 mA 12
Internal Pull-up Resistor Temperature Coefficient ∆RL/∆TA 0.014 kΩ/°C 12
Propagation Delay Time to Logic Low at Output (internal RL) tPHL 20 200 400 ns IF(on) = 10 mA, VF(off) = 0.8 V, VCC = 15.0 V, CL = 100 pF 13
Propagation Delay Time to High Output Level (internal RL) tPLH 220 450 650 ns VTHLH = 2.0 V, VTHHL = 1.5 V 13
Pulse Width Distortion (internal RL) PWD 250 500 ns 13
Propagation Delay Difference Between Any 2 Parts (internal RL) tPLH-tPHL -150 250 500 ns 13
Output High Level Common Mode Transient Immunity (internal RL) /CMH/ 30 kV/µs IF = 0 mA, VCC = 15.0 V, VO > 3.0 V, CL = 100 pF, VCM = 1500 Vp-p 13
Output Low Level Common Mode Transient Immunity (internal RL) /CML/ 30 kV/µs IF = 16 mA, TA = 25°C, VO < 1.0 V 13
Propagation Delay Time to Logic Low at Output (external 20 kΩ RL) TPHL 30 200 400 ns CL = 100 pF, IF(on) = 10 mA, VF(off) = 0.8 V, VCC = 15.0 V 13
Propagation Delay Time to High Output Level (external 20 kΩ RL) TPLH 270 400 550 ns CL = 100 pF, VTHLH = 2.0 V, VTHHL = 1.5 V 13
Pulse Width Distortion (external 20 kΩ RL) PWD 200 450 ns CL = 100 pF 13
Propagation Delay Difference Between Any 2 Parts (external 20 kΩ RL) tPLH-tPHL -150 200 450 ns 13
Output High Level Common Mode Transient Immunity (external 20 kΩ RL) /CMH/ 15 30 kV/µs IF = 0 mA, VCC = 15.0 V, CL = 100 pF, VCM = 1500 Vp-p, VO > 3.0 V 13
Output Low Level Common Mode Transient Immunity (external 20 kΩ RL) /CML/ 15 30 kV/µs IF = 10 mA, TA = 25°C, VO < 1.0 V 13
Input-Output Momentary Withstand Voltage, HCNW4506 VISO 5000 V rms RH < 50%, t = 1 min. 14
Capacitance (Input-Output), HCNW4506 CI-O 0.5 pF f = 1 MHz 14
Maximum Working Insulation Voltage (IEC 60747-5-2) VIORM 1414 Vpeak 10
Highest Allowable Overvoltage (IEC 60747-5-2) VIOTM 8000 Vpeak tini = 10 sec 10
Safety Limiting Case Temperature (IEC 60747-5-2) TS 150 °C 10
Safety Limiting Input Current (IEC 60747-5-2) IS INPUT 400 mA 10
Safety Limiting Output Power (IEC 60747-5-2) PS OUTPUT 700 mW 10

CAD (KiCad official)

  • Symbol: HCNW4506-000E
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: hcnw4506-000e-etched.step / hcnw4506-000e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hcnw4506-000e.step / hcnw4506-000e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Broadcom AVAGO datasheet (22 pp, sha256 3b67cc413e719928, retrieved 2026-10-15, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF