component
HCF4021YM013TR
Public Made by Adomby adom
STMicroelectronics Shift Registers, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHCF4021YM013TR
STMicroelectronics · Shift Registers · SO-16
HCF4021YM013TR from STMicroelectronics, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PI-8 | input | Parallel input to stage 8 of the shift register for asynchronous jam entry when parallel/serial control input is high. |
| 2 | Q6 | output | Buffered Q output from shift register stage 6. |
| 3 | Q7 | output | Buffered Q output from shift register stage 7. |
| 4 | PI-4 | input | Parallel input to stage 4 of the shift register for asynchronous jam entry when parallel/serial control input is high. |
| 5 | PI-3 | input | Parallel input to stage 3 of the shift register for asynchronous jam entry when parallel/serial control input is high. |
| 6 | PI-2 | input | Parallel input to stage 2 of the shift register for asynchronous jam entry when parallel/serial control input is high. |
| 7 | PI-1 | input | Parallel input to stage 1 of the shift register for asynchronous jam entry when parallel/serial control input is high. |
| 8 | VSS | power_in | Negative supply voltage (ground reference). |
| 9 | PARALLEL/SERIAL CONTROL | input | Parallel/serial control input; low selects serial shift mode, high selects parallel jam mode. |
| 10 | CLOCK | input | Clock input; positive edge triggers synchronous data entry in the selected mode. |
| 11 | SERIAL IN | input | Serial data input for shifting data into the register when parallel/serial control input is low. |
| 12 | Q8 | output | Buffered Q output from shift register stage 8 (final serial output). |
| 13 | PI-5 | input | Parallel input to stage 5 of the shift register for asynchronous jam entry when parallel/serial control input is high. |
| 14 | PI-6 | input | Parallel input to stage 6 of the shift register for asynchronous jam entry when parallel/serial control input is high. |
| 15 | PI-7 | input | Parallel input to stage 7 of the shift register for asynchronous jam entry when parallel/serial control input is high. |
| 16 | VDD | power_in | Positive supply voltage; operating range 3 to 20 V per recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
HCF4021YM013TR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files:
hcf4021ym013tr-etched.step/hcf4021ym013tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hcf4021ym013tr.step/hcf4021ym013tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (13 pp, sha256
b0614a47daab20a5, retrieved 2026-10-06, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).