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HC32L196MCTA-LQFP80

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XHSC Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllershc32l196mcta-lqfp80factory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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HC32L196MCTA-LQFP80

XHSC · Microcontrollers (MCU/MPU/SOC) · LQFP-80(12x12)

HC32L196MCTA-LQFP80 from XHSC, in a LQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE02 bidirectional Port E bit 2 GPIO; digital alternate function PCA_ECI (PCA external clock input).
2 PE03 bidirectional Port E bit 3 GPIO; digital alternate function PCA_CH0 (PCA capture/compare/PWM output 0).
3 PE04 bidirectional Port E bit 4 GPIO; digital alternate function PCA_CH1 (PCA capture/compare/PWM output 1).
4 PE05 bidirectional Port E bit 5 GPIO; digital alternate function PCA_CH2 (PCA capture/compare/PWM output 2).
5 VCAP power_out Internal LDO core-supply output for internal circuits only; requires an external decoupling capacitor of not less than 1 uF.
6 PC13 bidirectional Port C bit 13 GPIO; digital functions RTC_1HZ and TIM3_CH1B, analog function LVD0 voltage-detection input.
7 XTLI/PC14 bidirectional Low-speed crystal (XTL, 32.768 kHz) oscillator input, multiplexed with GPIO PC14; load capacitors must follow the crystal manufacturer specification.
8 XTLO/PC15 bidirectional Low-speed crystal (XTL, 32.768 kHz) oscillator output, multiplexed with GPIO PC15; load capacitors must follow the crystal manufacturer specification.
9 XTHI/PF00 bidirectional High-speed crystal (XTH, 4-32 MHz) oscillator input, multiplexed with GPIO PF00; digital alternate functions I2C0_SDA and UART1_TXD.
10 XTHO/PF01 bidirectional High-speed crystal (XTH, 4-32 MHz) oscillator output, multiplexed with GPIO PF01; digital alternate functions I2C0_SCL, TIM4_CHB and UART1_RXD.
11 RESETB input Active-low reset input in CMOS technology with a non-disconnectable weak pull-up (equivalent 80 kOhm), 200 mV Schmitt hysteresis and 100 ns input filter pulse.
12 SEG27/PC00 bidirectional Port C bit 0 GPIO; LCD segment output SEG27, analog inputs AIN10/VC0_INP0/VC1_INN0, digital alternates LPTIM0_GATE, PCNT_S0, UART1_CTS, UART2_RTS.
13 SEG26/PC01 bidirectional Port C bit 1 GPIO; LCD segment output SEG26, analog inputs AIN11/VC0_INP1/VC1_INN1, digital alternates LPTIM0_TOG, TIM5_CHB, UART1_RTS, PCNT_S0FO, UART2_CTS.
14 SEG25/PC02 bidirectional Port C bit 2 GPIO; LCD segment output SEG25, analog inputs AIN12/VC0_INP2/VC1_INN2, digital alternates SPI1_MISO, LPTIM0_TOGN, PCNT_S1, UART2_RXD.
15 SEG24/PC03 bidirectional Port C bit 3 GPIO; LCD segment output SEG24, analog inputs AIN13/VC0_INP3/VC1_INN3, digital alternates SPI1_MOSI, LPTIM0_ETR, LPTIM0_TOGN, PCNT_S1FO, UART2_TXD.
16 AVSS power_in Analog ground; must be connected to the system ground (all VSS pins are referenced to VSS).
17 AVCC power_in Analog supply, operating range 1.8-5.5 V; AVCC and DVCC must be at the same voltage.
18 SEG23/PA00 bidirectional Port A bit 0 GPIO; LCD segment output SEG23, analog inputs AIN0/VC0_INP4/VC0_INN0/VC1_INP0/VC1_INN4, digital alternates include UART1_CTS, LPUART1_TXD, TIM0_ETR, VC0_OUT, TIM1_CHA, TIM3_ETR, TIM0_CHA.
19 SEG22/PA01 bidirectional Port A bit 1 GPIO; LCD segment output SEG22, analog inputs AIN1/VC0_INP5/VC0_INN1/VC1_INP1/VC1_INN5, digital alternates include UART1_RTS, LPUART1_RXD, TIM0_CHB, TIM1_ETR, TIM1_CHB, HCLK_OUT, SPI1_MOSI.
20 SEG21/PA02 bidirectional Port A bit 2 GPIO; LCD segment output SEG21, analog inputs AIN2/VC0_INP6/VC0_INN2/VC1_INP2, digital alternates include UART1_TXD, TIM0_CHA, VC1_OUT, TIM1_CHA, TIM2_CHA, PCLK_OUT, SPI1_MISO.
21 SEG20/PA03 bidirectional Port A bit 3 GPIO; LCD segment output SEG20, analog inputs AIN3/VC0_INP7/VC0_INN3/VC1_INP3, digital alternates include UART1_RXD, TIM0_GATE, TIM1_CHB, TIM2_CHB, SPI1_CS, TIM3_CH1A, TIM5_CHA.
22 PF04 bidirectional Port F bit 4 GPIO; no alternate function is listed for this pin in the datasheet pin-function table.
23 PF05 bidirectional Port F bit 5 GPIO; no alternate function is listed for this pin in the datasheet pin-function table.
24 SEG19/PA04 bidirectional Port A bit 4 GPIO; LCD segment output SEG19, analog inputs AIN4/VC0_INP8/VC0_INN4/VC1_INP4, DAC_OUT and OPA_OUT0, digital alternates include SPI0_CS, UART1_TXD, PCA_CH4, TIM2_ETR, TIM5_CHA, LVD_OUT, TIM3_CH2B.
25 SEG18/PA05 bidirectional Port A bit 5 GPIO; LCD segment output SEG18, digital alternates include SPI0_SCK, TIM0_ETR, PCA_ECI, TIM0_CHA, TIM5_CHB, XTL_OUT and XTH_OUT.
26 SEG17/PA06 bidirectional Port A bit 6 GPIO; LCD segment output SEG17, digital alternates include SPI0_MISO, PCA_CH0, TIM3_BK, TIM1_CHA, VC0_OUT, TIM3_GATE, LPUART0_CTS.
27 SEG16/PA07 bidirectional Port A bit 7 GPIO; LCD segment output SEG16, digital alternates include SPI0_MOSI, PCA_CH1, HCLK_OUT, TIM3_CH0B, TIM2_CHA, VC1_OUT, TIM4_CHB.
28 SEG15/PC04 bidirectional Port C bit 4 GPIO; LCD segment output SEG15, digital alternates LPUART0_TXD, TIM2_ETR, IR_OUT and VC2_OUT.
29 SEG14/PC05 bidirectional Port C bit 5 GPIO; LCD segment output SEG14, digital alternates LPUART0_RXD, TIM6_CHB and PCA_CH4.
30 SEG13/PB00 bidirectional Port B bit 0 GPIO; LCD segment output SEG13, digital alternates PCA_CH2, TIM3_CH1B, LPUART0_TXD, TIM5_CHB, RCH_OUT, RCL_OUT and PLL_OUT.
31 SEG12/PB01 bidirectional Port B bit 1 GPIO; LCD segment output SEG12, digital alternates PCA_CH3, PCLK_OUT, TIM3_CH2B, TIM6_CHB, LPUART0_RTS, VC2_OUT and TCLK_OUT.
32 SEG11/PB02 bidirectional Port B bit 2 GPIO; LCD segment output SEG11, digital alternates LPTIM_TOG, PCA_ECI, LPUART1_TXD, TIM4_CHA, TIM1_BK, TIM0_BK and TIM2_BK.
33 PE11 bidirectional Port E bit 11 GPIO; digital alternate function TIM3_CH1A.
34 SEG51/PE12 bidirectional Port E bit 12 GPIO; LCD segment output SEG51, digital alternates TIM3_CH2B, SPI0_CS and UART3_CTS.
35 SEG50/PE13 bidirectional Port E bit 13 GPIO; LCD segment output SEG50, digital alternates TIM3_CH2A, SPI0_SCK and UART3_RTS.
36 SEG49/PE14 bidirectional Port E bit 14 GPIO; LCD segment output SEG49, digital alternates TIM3_CH0B, SPI0_MISO and UART3_RXD.
37 SEG10/PB10 bidirectional Port B bit 10 GPIO; LCD segment output SEG10, digital alternates I2C1_SCL, SPI1_SCK, TIM1_CHA, LPUART0_TXD, TIM3_CH1A, LPUART1_RTS and UART1_RTS.
38 SEG9/PB11 bidirectional Port B bit 11 GPIO; LCD segment output SEG9, digital alternates I2C1_SDA, TIM1_CHB, LPUART0_RXD, TIM2_GATE, TIM6_CHA, LPUART1_CTS and UART1_CTS.
39 DVSS power_in Digital ground; must be connected to the system ground.
40 DVCC power_in Digital supply, operating range 1.8-5.5 V; must be at the same voltage as AVCC and needs its own decoupling capacitor placed close to the pin.
41 PB12/SEG8 bidirectional Port B bit 12 GPIO; LCD segment output SEG8, digital alternates SPI1_CS, TIM3_BK, LPUART0_TXD, TIM0_BK, LPUART0_RTS and TIM6_CHA.
42 PB13/SEG7 bidirectional Port B bit 13 GPIO; LCD segment output SEG7, digital alternates SPI1_SCK, I2C1_SCL, TIM3_CH0B, LPUART0_CTS, TIM1_CHA, TIM1_GATE and TIM6_CHB.
43 PB14/SEG6 bidirectional Port B bit 14 GPIO; LCD segment output SEG6, digital alternates SPI1_MISO, I2C1_SDA, TIM3_CH1B, TIM0_CHA, RTC_1HZ, LPUART0_RTS and TIM1_BK.
44 PB15/SEG5 bidirectional Port B bit 15 GPIO; LCD segment output SEG5, digital alternates SPI1_MOSI, TIM3_CH2B, TIM0_CHB, TIM0_GATE and LPUART1_RXD.
45 PD08/SEG47 bidirectional Port D bit 8 GPIO; LCD segment output SEG47 and digital alternate LPUART0_TXD.
46 PD09/SEG46 bidirectional Port D bit 9 GPIO; LCD segment output SEG46 and digital alternate LPUART0_RXD.
47 PD10/SEG45 bidirectional Port D bit 10 GPIO; LCD segment output SEG45 and digital alternate LPUART0_TXD.
48 PD11/SEG44 bidirectional Port D bit 11 GPIO; LCD segment output SEG44 and digital alternate LPUART0_CTS.
49 PC06/SEG4 bidirectional Port C bit 6 GPIO; LCD segment output SEG4, digital alternates PCA_CH0, TIM4_CHA, TIM2_CHA, LPTIM1_GATE and UART3_RXD.
50 PC07/SEG3 bidirectional Port C bit 7 GPIO; LCD segment output SEG3, digital alternates PCA_CH1, TIM5_CHA, TIM2_CHB, LPTIM1_ETR and UART3_TXD.
51 PC08/SEG2 bidirectional Port C bit 8 GPIO; LCD segment output SEG2, digital alternates PCA_CH2, TIM6_CHA, TIM2_ETR, LPTIM1_TOG and UART3_CTS.
52 PC09/SEG1 bidirectional Port C bit 9 GPIO; LCD segment output SEG1, digital alternates PCA_CH3, TIM4_CHB, TIM1_ETR, LPTIM1_TOGN and UART3_RTS.
53 PA08/SEG0 bidirectional Port A bit 8 GPIO; LCD segment output SEG0, digital alternates UART0_TXD, TIM3_CH0A, TIM1_GATE, TIM4_CHA and TIM3_BK.
54 PA09/COM0 bidirectional Port A bit 9 GPIO; LCD common output COM0, digital alternates UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT and TIM5_CHA.
55 PA10/COM1 bidirectional Port A bit 10 GPIO; LCD common output COM1, digital alternates UART0_RXD, TIM3_CH2A, TIM2_BK, I2C0_SDA, TIM2_GATE, PCLK_OUT and TIM6_CHA.
56 PA11/COM2 bidirectional Port A bit 11 GPIO; LCD common output COM2, digital alternates UART0_CTS, TIM3_GATE, I2C1_SCL, VC0_OUT, SPI0_MISO and TIM4_CHB.
57 PA12/COM3 bidirectional Port A bit 12 GPIO; LCD common output COM3, digital alternates UART0_RTS, TIM3_ETR, I2C1_SDA, VC1_OUT, SPI0_MOSI and PCNT_S0.
58 PA13/SWDIO bidirectional Port A bit 13 GPIO; serial-wire debug data I/O (SWDIO), also digital alternates IR_OUT, UART0_RXD, LVD_OUT, TIM3_ETR, RTC_1HZ, PCNT_S1 and VC2_OUT.
59 PF06 bidirectional Port F bit 6 GPIO; digital alternates I2C1_SCL, LPUART1_CTS and UART0_CTS.
60 PF07 bidirectional Port F bit 7 GPIO; digital alternates I2C1_SDA, LPUART1_RTS and UART0_RTS.
61 PA14/SWCLK bidirectional Port A bit 14 GPIO; serial-wire debug clock (SWCLK), also digital alternates UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH_OUT, RCL_OUT and PLL_OUT.
62 PA15 bidirectional Port A bit 15 GPIO; digital alternates SPI0_CS, UART1_RXD, LPUART1_RTS, TIM0_ETR, TIM0_CHA and TIM3_CH1A.
63 PC10/COM4/SEG39 bidirectional Port C bit 10 GPIO; LCD common output COM4 / segment output SEG39, digital alternates LPUART1_TXD, LPUART0_TXD and PCA_CH2.
64 PC11/COM5/SEG38 bidirectional Port C bit 11 GPIO; LCD common output COM5 / segment output SEG38, digital alternates LPUART1_RXD, LPUART0_RXD, PCA_CH3 and PCNT_S0FO.
65 PC12/COM6/SEG37 bidirectional Port C bit 12 GPIO; LCD common output COM6 / segment output SEG37, digital alternates LPUART0_TXD, LPUART1_TXD, PCA_CH4 and PCNT_S1FO.
66 PD00 bidirectional Port D bit 0 GPIO; digital alternate function SPI1_CS.
67 PD01 bidirectional Port D bit 1 GPIO; digital alternate function SPI1_SCK.
68 PD02/COM7/SEG36 bidirectional Port D bit 2 GPIO; LCD common output COM7 / segment output SEG36, digital alternates PCA_ECI, LPUART0_RTS and TIM1_ETR.
69 PD03 bidirectional Port D bit 3 GPIO; digital alternates UART1_CTS, SPI1_MISO and LPTIM1_TOG.
70 PD04 bidirectional Port D bit 4 GPIO; digital alternates UART1_RTS, SPI1_MOSI and LPTIM1_TOGN.
71 PB03/SEG35/VLCDH bidirectional Port B bit 3 GPIO; LCD segment output SEG35, LCD voltage pin VLCDH for external-resistor/external-capacitor LCD modes (LCD maximum voltage VCC), digital alternates SPI0_SCK, TIM0_CHB, TIM1_GATE, TIM3_CH0A, LPTIM_GATE, XTL_OUT and XTH_OUT.
72 PB04/SEG34/VLCD3 bidirectional Port B bit 4 GPIO; LCD segment output SEG34, LCD voltage pin VLCD3 (highest LCD voltage, at most VLCDH), digital alternates SPI0_MISO, PCA_CH0, TIM2_BK, UART0_CTS, TIM2_GATE, TIM3_CH0B and LPTIM_ETR.
73 PB05/SEG33/VLCD2 bidirectional Port B bit 5 GPIO; LCD segment output SEG33, LCD voltage pin VLCD2 (2/3 VLCDH), digital alternates SPI0_MOSI, TIM1_BK, PCA_CH1, LPTIM_GATE, PCNT_S0 and UART0_RTS.
74 PB06/SEG32/VLCD1 bidirectional Port B bit 6 GPIO; LCD segment output SEG32, LCD voltage pin VLCD1 (1/3 VLCDH), digital alternates I2C0_SCL, UART0_TXD, TIM1_CHB, TIM0_CHA, LPTIM_ETR, TIM3_CH0A and LPTIM_TOG.
75 PB07/SEG31 bidirectional Port B bit 7 GPIO; LCD segment output SEG31, digital alternates I2C0_SDA, UART0_RXD, TIM2_CHB, LPUART1_CTS, TIM0_CHB, LPTIM_TOGN and PCNT_S1.
76 BOOT0 input Boot mode pin (PF11 function): high at reset selects ISP programming mode, low selects user mode executing from Flash with SWD programming.
77 PB08/SEG29 bidirectional Port B bit 8 GPIO; LCD segment output SEG29, digital alternates I2C0_SCL, TIM1_CHA, TIM2_CHA, TIM0_GATE, TIM3_CH2A and UART0_TXD.
78 PB09/SEG28 bidirectional Port B bit 9 GPIO; LCD segment output SEG28, digital alternates I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA, TIM2_CHB and UART0_RXD.
79 DVSS power_in Digital ground; must be connected to the system ground.
80 DVCC power_in Digital supply, operating range 1.8-5.5 V; must be at the same voltage as AVCC and needs its own decoupling capacitor placed close to the pin.

Key specifications

Parameter Value
Manufacturer XHSC
Package LQFP-80(12x12)
Category Embedded Processors & Controllers
Pins 80

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External main supply voltage VCC-VSS (incl. AVCC and DVCC) VCC - VSS -0.3 5.5 V 49
Voltage difference between different supply pins /ΔVCCx/ 50 mV 49
Voltage difference between different ground pins /VSSx - VSS/ 50 mV 49
Total current through DVCC/AVCC supply lines IVCC 300 mA 49
Total current through VSS ground line IVSS 300 mA 49
Output sink current on any I/O and control pin IIO 25 mA 49
Output current on any I/O and control pin IIO -25 mA 49
Injection current on RESETB pin IINJ(PIN) -5 5 mA 49
Injection current on XTHI pin of XTH and XTLI pin of XTL IINJ(PIN) -5 5 mA 49
Injection current on other pins IINJ(PIN) -5 5 mA 49
Total injection current on all I/O and control pins ΣIINJ(PIN) -25 25 mA 49
External input voltage range Vex 0 V 53
LVD detection threshold, nominal 1.8 V Vlevel -3.5 3.5 % LVD_CR.VTDS=0000 53
LVD detection threshold, nominal 1.9 V Vlevel -3.5 3.5 % LVD_CR.VTDS=0001 53
LVD detection threshold, nominal 2.0 V Vlevel -3.5 3.5 % LVD_CR.VTDS=0010 53
LVD detection threshold, nominal 2.1 V Vlevel -3.5 3.5 % LVD_CR.VTDS=0011 53
LVD detection threshold, nominal 2.2 V Vlevel -3.5 3.5 % LVD_CR.VTDS=0100 53
LVD detection threshold, nominal 2.3 V Vlevel -3.5 3.5 % LVD_CR.VTDS=0101 53
LVD detection threshold, nominal 2.4 V Vlevel -3.5 3.5 % LVD_CR.VTDS=0110 53
LVD detection threshold, nominal 2.5 V Vlevel -3.5 3.5 % LVD_CR.VTDS=0111 53
LVD detection threshold, nominal 2.6 V Vlevel -3.5 3.5 % LVD_CR.VTDS=1000 53
LVD detection threshold, nominal 2.7 V Vlevel -3.5 3.5 % LVD_CR.VTDS=1001 53
LVD detection threshold, nominal 2.8 V Vlevel -3.5 3.5 % LVD_CR.VTDS=1010 53
LVD detection threshold, nominal 2.9 V Vlevel -3.5 3.5 % LVD_CR.VTDS=1011 53
LVD detection threshold, nominal 3.0 V Vlevel -3.5 3.5 % LVD_CR.VTDS=1100 53
LVD detection threshold, nominal 3.1 V Vlevel -3.5 3.5 % LVD_CR.VTDS=1101 53
LVD detection threshold, nominal 3.2 V Vlevel -3.5 3.5 % LVD_CR.VTDS=1110 53
LVD detection threshold, nominal 3.3 V Vlevel -3.5 3.5 % LVD_CR.VTDS=1111 53
Internal 2.5V reference voltage at 25°C VREF25 2.475 2.5 2.525 V 25°C, VCC 3.3V 54
Internal 2.5V reference voltage over temperature VREF25 2.463 2.5 2.525 V -40 to 85°C, VCC 2.8-5.5V 54
Internal 1.5V reference voltage at 25°C VREF15 1.485 1.5 1.515 V 25°C, VCC 3.3V 54
Internal 1.5V reference voltage over temperature VREF15 1.477 1.5 1.519 V -40 to 85°C, VCC 1.8-5.5V 54
Internal 2.5V / 1.5V reference temperature coefficient TCoeff 120 ppm/°C -40 to 85°C 54
Run while(1) in Flash, all peripherals on, RCH 4M IDD 1000 1430 μA RCH clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Run while(1) in Flash, all peripherals on, RCH 8M IDD 1890 2710 μA RCH clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Run while(1) in Flash, all peripherals on, RCH 16M IDD 3710 5160 μA RCH clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Run while(1) in Flash, all peripherals on, RCH 22.12M IDD 5010 7000 μA RCH clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Run while(1) in Flash, all peripherals on, RCH 24M IDD 5400 7570 μA RCH clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Run while(1) in Flash, all peripherals on, PLL from RCH4M, 16M IDD 3930 4990 μA PLL RCH4M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Run while(1) in Flash, all peripherals on, PLL from RCH4M, 24M IDD 5480 7080 μA PLL RCH4M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Run while(1) in Flash, all peripherals on, PLL from RCH4M, 32M IDD 6590 7640 μA PLL RCH4M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, FlashWait=1 55
Run while(1) in Flash, all peripherals on, PLL from RCH4M, 40M IDD 8100 9470 μA PLL RCH4M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, FlashWait=1 55
Run while(1) in Flash, all peripherals on, PLL from RCH4M, 48M IDD 9610 11200 μA PLL RCH4M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, FlashWait=1 55
Run while(1) in Flash, all peripherals on, PLL from RCH8M, 16M IDD 3990 5030 μA PLL RCH8M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Run while(1) in Flash, all peripherals on, PLL from RCH8M, 24M IDD 5530 7130 μA PLL RCH8M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Run while(1) in Flash, all peripherals on, PLL from RCH8M, 32M IDD 6640 7680 μA PLL RCH8M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, FlashWait=1 55
Run while(1) in Flash, all peripherals on, PLL from RCH8M, 40M IDD 8160 9470 μA PLL RCH8M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, FlashWait=1 55
Run while(1) in Flash, all peripherals on, PLL from RCH8M, 48M IDD 9670 11240 μA PLL RCH8M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, FlashWait=1 55
Sleep (CPU stopped, peripherals off, main clock running) in Flash, RCH 4M IDD 610 990 μA RCH clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Sleep (CPU stopped, peripherals off, main clock running) in Flash, RCH 8M IDD 1090 1830 μA RCH clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Sleep (CPU stopped, peripherals off, main clock running) in Flash, RCH 16M IDD 2080 3350 μA RCH clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Sleep (CPU stopped, peripherals off, main clock running) in Flash, RCH 22.12M IDD 2770 4480 μA RCH clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Sleep (CPU stopped, peripherals off, main clock running) in Flash, RCH 24M IDD 2970 4810 μA RCH clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Sleep in Flash, PLL from RCH4M, 16M IDD 2290 3150 μA PLL RCH4M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Sleep in Flash, PLL from RCH4M, 24M IDD 3060 4360 μA PLL RCH4M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C 55
Sleep in Flash, PLL from RCH4M, 32M IDD 3410 4020 μA PLL RCH4M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, FlashWait=1 55
Sleep in Flash, PLL from RCH4M, 40M IDD 4110 4950 μA PLL RCH4M clock source, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, FlashWait=1 55

CAD (KiCad official)

  • Symbol: HC32L196MCTA-LQFP80
  • Footprint: Package_QFP:LQFP-80_12x12mm_P0.5mm
  • 3D model: LQFP-80(12x12) (KiCad packages3D, STEP)
  • 3D model files: hc32l196mcta-lqfp80-etched.step / hc32l196mcta-lqfp80-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hc32l196mcta-lqfp80.step / hc32l196mcta-lqfp80.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XHSC datasheet (98 pp, sha256 3664a76916c1dfdf, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF