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HC32L196JCTA-LQ48

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XHSC Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HC32L196JCTA-LQ48

XHSC · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

HC32L196JCTA-LQ48 from XHSC, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCAP power_out LDO core-supply output for internal circuits only, requiring an external decoupling capacitor of at least 1 µF.
2 PC13 bidirectional GPIO PC13 (reset to high-impedance input) with alternate functions RTC_1HZ and TIM3_CH1B and analog LVD0 input.
3 XTLI/PC14 input Low-speed crystal (XTL, 32.768 kHz) oscillator input, also GPIO PC14.
4 XTLO/PC15 output Low-speed crystal (XTL, 32.768 kHz) oscillator output, also GPIO PC15.
5 XTHI/PF00 input High-speed crystal (XTH, 4-32 MHz) oscillator input, also GPIO PF00 with I2C0_SDA and UART1_TXD functions.
6 XTHO/PF01 output High-speed crystal (XTH, 4-32 MHz) oscillator output, also GPIO PF01 with I2C0_SCL, TIM4_CHB and UART1_RXD functions.
7 RESETB input CMOS reset input with a non-disconnectable internal pull-up (RPU 80 kΩ), VIH 0.7VCC min, VIL 0.3VCC max, 200 mV hysteresis.
8 AVSS power_in Analog ground pin for the ADC, DAC, comparators and other analog circuits.
9 AVCC power_in Analog supply pin; AVCC and DVCC must be at the same voltage, operating range 1.8-5.5 V.
10 SEG23/PA00 bidirectional GPIO PA00 with LCD SEG23, analog AIN0/VC0/VC1 inputs, and digital alternates UART1_CTS, LPUART1_TXD, TIM0_ETR, VC0_OUT, TIM1_CHA, TIM3_ETR, TIM0_CHA.
11 SEG22/PA01 bidirectional GPIO PA01 with LCD SEG22, analog AIN1/VC0/VC1 inputs, and digital alternates UART1_RTS, LPUART1_RXD, TIM0_CHB, TIM1_ETR, TIM1_CHB, HCLK_OUT, SPI1_MOSI.
12 SEG21/PA02 bidirectional GPIO PA02 with LCD SEG21, analog AIN2/VC0/VC1 inputs, and digital alternates UART1_TXD, TIM0_CHA, VC1_OUT, TIM1_CHA, TIM2_CHA, PCLK_OUT, SPI1_MISO.
13 SEG20/PA03 bidirectional GPIO PA03 with LCD SEG20, analog AIN3/VC0/VC1 inputs, and digital alternates UART1_RXD, TIM0_GATE, TIM1_CHB, TIM2_CHB, SPI1_CS, TIM3_CH1A, TIM5_CHA.
14 SEG19/PA04 bidirectional GPIO PA04 with LCD SEG19, analog AIN4, DAC_OUT and OPA_OUT0, and digital alternates SPI0_CS, UART1_TXD, PCA_CH4, TIM2_ETR, TIM5_CHA, LVD_OUT, TIM3_CH2B.
15 SEG18/PA05 bidirectional GPIO PA05 with LCD SEG18 and digital alternates SPI0_SCK, TIM0_ETR, PCA_ECI, TIM0_CHA, TIM5_CHB, XTL_OUT, XTH_OUT.
16 SEG17/PA06 bidirectional GPIO PA06 with LCD SEG17 and digital alternates SPI0_MISO, PCA_CH0, TIM3_BK, TIM1_CHA, VC0_OUT, TIM3_GATE, LPUART0_CTS.
17 SEG16/PA07 bidirectional GPIO PA07 with LCD SEG16 and digital alternates SPI0_MOSI, PCA_CH1, HCLK_OUT, TIM3_CH0B, TIM2_CHA, VC1_OUT, TIM4_CHB.
18 SEG13/PB00 bidirectional GPIO PB00 with LCD SEG13 and digital alternates PCA_CH2, TIM3_CH1B, LPUART0_TXD, TIM5_CHB, RCH_OUT, RCL_OUT, PLL_OUT.
19 SEG12/PB01 bidirectional GPIO PB01 with LCD SEG12 and digital alternates PCA_CH3, PCLK_OUT, TIM3_CH2B, TIM6_CHB, LPUART0_RTS, VC2_OUT, TCLK_OUT.
20 SEG11/PB02 bidirectional GPIO PB02 with LCD SEG11 and digital alternates LPTIM_TOG, PCA_ECI, LPUART1_TXD, TIM4_CHA, TIM1_BK, TIM0_BK, TIM2_BK.
21 SEG10/PB10 bidirectional GPIO PB10 with LCD SEG10 and digital alternates I2C1_SCL, SPI1_SCK, TIM1_CHA, LPUART0_TXD, TIM3_CH1A, LPUART1_RTS, UART1_RTS.
22 SEG9/PB11 bidirectional GPIO PB11 with LCD SEG9 and digital alternates I2C1_SDA, TIM1_CHB, LPUART0_RXD, TIM2_GATE, TIM6_CHA, LPUART1_CTS, UART1_CTS.
23 DVSS power_in Digital ground pin.
24 DVCC power_in Digital supply pin; must be at the same voltage as AVCC, operating range 1.8-5.5 V.
25 PB12 bidirectional GPIO PB12 with LCD SEG8 and digital alternates SPI1_CS, TIM3_BK, LPUART0_TXD, TIM0_BK, LPUART0_RTS, TIM6_CHA.
26 PB13 bidirectional GPIO PB13 with LCD SEG7 and digital alternates SPI1_SCK, I2C1_SCL, TIM3_CH0B, LPUART0_CTS, TIM1_CHA, TIM1_GATE, TIM6_CHB.
27 PB14 bidirectional GPIO PB14 with LCD SEG6 and digital alternates SPI1_MISO, I2C1_SDA, TIM3_CH1B, TIM0_CHA, RTC_1HZ, LPUART0_RTS, TIM1_BK.
28 PB15 bidirectional GPIO PB15 with LCD SEG5 and digital alternates SPI1_MOSI, TIM3_CH2B, TIM0_CHB, TIM0_GATE, LPUART1_RXD.
29 PA08 bidirectional GPIO PA08 with LCD SEG0 and digital alternates UART0_TXD, TIM3_CH0A, TIM1_GATE, TIM4_CHA, TIM3_BK.
30 PA09 bidirectional GPIO PA09 with LCD COM0 and digital alternates UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT, TIM5_CHA.
31 PA10 bidirectional GPIO PA10 with LCD COM1 and digital alternates UART0_RXD, TIM3_CH2A, TIM2_BK, I2C0_SDA, TIM2_GATE, PCLK_OUT, TIM6_CHA.
32 PA11 bidirectional GPIO PA11 with LCD COM2 and digital alternates UART0_CTS, TIM3_GATE, I2C1_SCL, VC0_OUT, SPI0_MISO, TIM4_CHB.
33 PA12 bidirectional GPIO PA12 with LCD COM3 and digital alternates UART0_RTS, TIM3_ETR, I2C1_SDA, VC1_OUT, SPI0_MOSI, PCNT_S0.
34 PA13/SWDIO bidirectional GPIO PA13 and SWD debug data I/O (SWDIO), with alternates IR_OUT, UART0_RXD, LVD_OUT, TIM3_ETR, RTC_1HZ, PCNT_S1, VC2_OUT.
35 PF06 bidirectional GPIO PF06 with alternates I2C1_SCL, LPUART1_CTS and UART0_CTS.
36 PF07 bidirectional GPIO PF07 with alternates I2C1_SDA, LPUART1_RTS and UART0_RTS.
37 PA14/SWCLK bidirectional GPIO PA14 and SWD debug clock (SWCLK), with alternates UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH_OUT, RCL_OUT, PLL_OUT.
38 PA15 bidirectional GPIO PA15 with alternates SPI0_CS, UART1_RXD, LPUART1_RTS, TIM0_ETR, TIM0_CHA, TIM3_CH1A.
39 PB03 bidirectional GPIO PB03 with LCD SEG35 and VLCDH (LCD top-voltage pin used in external resistor/capacitor modes), plus alternates SPI0_SCK, TIM0_CHB, TIM1_GATE, TIM3_CH0A, LPTIM_GATE, XTL_OUT, XTH_OUT.
40 PB04 bidirectional GPIO PB04 with LCD SEG34 and VLCD3 (LCD voltage pin in external resistor/capacitor modes), plus alternates SPI0_MISO, PCA_CH0, TIM2_BK, UART0_CTS, TIM2_GATE, TIM3_CH0B, LPTIM_ETR.
41 PB05 bidirectional GPIO PB05 with LCD SEG33 and VLCD2 (LCD voltage pin in external resistor/capacitor modes), plus alternates SPI0_MOSI, TIM1_BK, PCA_CH1, LPTIM_GATE, PCNT_S0, UART0_RTS.
42 PB06 bidirectional GPIO PB06 with LCD SEG32 and VLCD1 (LCD voltage pin in external resistor/capacitor modes), plus alternates I2C0_SCL, UART0_TXD, TIM1_CHB, TIM0_CHA, LPTIM_ETR, TIM3_CH0A, LPTIM_TOG.
43 PB07 bidirectional GPIO PB07 with LCD SEG31 and alternates I2C0_SDA, UART0_RXD, TIM2_CHB, LPUART1_CTS, TIM0_CHB, LPTIM_TOGN, PCNT_S1; also an LVD monitor input (PB07).
44 BOOT0 input Boot mode pin (BOOT0, PF11 per section 1.31): high at reset selects ISP programming mode, low selects user mode with SWD programming.
45 PB08 bidirectional GPIO PB08 with LCD SEG29 and alternates I2C0_SCL, TIM1_CHA, TIM2_CHA, TIM0_GATE, TIM3_CH2A, UART0_TXD.
46 PB09 bidirectional GPIO PB09 with LCD SEG28 and alternates I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA, TIM2_CHB, UART0_RXD.
47 DVSS power_in Digital ground pin.
48 DVCC power_in Digital supply pin; must be at the same voltage as AVCC, operating range 1.8-5.5 V.

Key specifications

Parameter Value
Manufacturer XHSC
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating supply voltage (VCC, from product feature summary) VCC 1.8 5.5 V 工作条件：-40 ~ 85℃，1.8 ~ 5.5V 1
Operating ambient temperature (from product feature summary) TA -40 85 ℃ 工作条件：-40 ~ 85℃，1.8 ~ 5.5V 1
External main supply voltage VCC-VSS (including AVCC and DVCC) VCC - VSS -0.3 5.5 V 49
Voltage difference between different supply pins /ΔVCCx/ 50 mV 49
Voltage difference between different ground pins /VSSx - VSS/ 50 mV 49
Total current through DVCC/AVCC supply lines (supply current) IVCC 300 mA 49
Total current through VSS ground lines (sink current) IVSS 300 mA 49
Output sink current on any I/O and control pin IIO 25 mA 49
Output source current on any I/O and control pin IIO -25 mA 49
Injection current on RESETB pin IINJ(PIN) -5 5 mA 49
Injection current on XTHI pin and XTLI pin IINJ(PIN) -5 5 mA 49
Injection current on other pins IINJ(PIN) -5 5 mA 49
Total injection current on all I/O and control pins ∑IINJ(PIN) -25 25 mA 49
External input voltage range Vex 0 V 53
LVD detection threshold, nominal 1.8 V (LVD_CR.VTDS=0000) Vlevel -3.5 3.5 % LVD_CR.VTDS=0000 53
LVD detection threshold, nominal 1.9 V (LVD_CR.VTDS=0001) Vlevel -3.5 3.5 % LVD_CR.VTDS=0001 53
LVD detection threshold, nominal 2.0 V (LVD_CR.VTDS=0010) Vlevel -3.5 3.5 % LVD_CR.VTDS=0010 53
LVD detection threshold, nominal 2.1 V (LVD_CR.VTDS=0011) Vlevel -3.5 3.5 % LVD_CR.VTDS=0011 53
LVD detection threshold, nominal 2.2 V (LVD_CR.VTDS=0100) Vlevel -3.5 3.5 % LVD_CR.VTDS=0100 53
LVD detection threshold, nominal 2.3 V (LVD_CR.VTDS=0101) Vlevel -3.5 3.5 % LVD_CR.VTDS=0101 53
LVD detection threshold, nominal 2.4 V (LVD_CR.VTDS=0110) Vlevel -3.5 3.5 % LVD_CR.VTDS=0110 53
LVD detection threshold, nominal 2.5 V (LVD_CR.VTDS=0111) Vlevel -3.5 3.5 % LVD_CR.VTDS=0111 53
LVD detection threshold, nominal 2.6 V (LVD_CR.VTDS=1000) Vlevel -3.5 3.5 % LVD_CR.VTDS=1000 53
LVD detection threshold, nominal 2.7 V (LVD_CR.VTDS=1001) Vlevel -3.5 3.5 % LVD_CR.VTDS=1001 53
LVD detection threshold, nominal 2.8 V (LVD_CR.VTDS=1010) Vlevel -3.5 3.5 % LVD_CR.VTDS=1010 53
LVD detection threshold, nominal 2.9 V (LVD_CR.VTDS=1011) Vlevel -3.5 3.5 % LVD_CR.VTDS=1011 53
LVD detection threshold, nominal 3.0 V (LVD_CR.VTDS=1100) Vlevel -3.5 3.5 % LVD_CR.VTDS=1100 53
LVD detection threshold, nominal 3.1 V (LVD_CR.VTDS=1101) Vlevel -3.5 3.5 % LVD_CR.VTDS=1101 53
LVD detection threshold, nominal 3.2 V (LVD_CR.VTDS=1110) Vlevel -3.5 3.5 % LVD_CR.VTDS=1110 53
LVD detection threshold, nominal 3.3 V (LVD_CR.VTDS=1111) Vlevel -3.5 3.5 % LVD_CR.VTDS=1111 53
Internal 2.5V reference voltage at 25°C VREF25 2.475 2.5 2.525 V 常温25°C 3.3V 54
Internal 2.5V reference voltage over temperature VREF25 2.463 2.5 2.525 V -40 85°C 2.85.5V 54
Internal 1.5V reference voltage at 25°C VREF15 1.485 1.5 1.515 V 常温25°C 3.3V 54
Internal 1.5V reference voltage over temperature VREF15 1.477 1.5 1.519 V -40 85°C 1.85.5V 54
IDD Run while(1) in Flash, all peripherals ON, PLL off, RCH 4M IDD 1000 1430 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH 4M 55
IDD Run while(1) in Flash, all peripherals ON, RCH 8M IDD 1890 2710 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH 8M 55
IDD Run while(1) in Flash, all peripherals ON, RCH 16M IDD 3710 5160 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH 16M 55
IDD Run while(1) in Flash, all peripherals ON, RCH 22.12M IDD 5010 7000 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH 22.12M 55
IDD Run while(1) in Flash, all peripherals ON, RCH 24M IDD 5400 7570 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH 24M 55
IDD Run while(1) in Flash, all peripherals ON, PLL from RCH4M to 16M IDD 3930 4990 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to 16M 55
IDD Run while(1) in Flash, all peripherals ON, PLL from RCH4M to 24M IDD 5480 7080 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to 24M 55
IDD Run while(1) in Flash, all peripherals ON, PLL from RCH4M to 32M IDD 6590 7640 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to 32M, FlashWait=1 55
IDD Run while(1) in Flash, all peripherals ON, PLL from RCH4M to 40M IDD 8100 9470 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to 40M, FlashWait=1 55
IDD Run while(1) in Flash, all peripherals ON, PLL from RCH4M to 48M IDD 9610 11200 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to 48M, FlashWait=1 55
IDD Run while(1) in Flash, all peripherals ON, PLL from RCH8M to 16M IDD 3990 5030 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to 16M 55
IDD Run while(1) in Flash, all peripherals ON, PLL from RCH8M to 24M IDD 5530 7130 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to 24M 55
IDD Run while(1) in Flash, all peripherals ON, PLL from RCH8M to 32M IDD 6640 7680 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to 32M, FlashWait=1 55
IDD Run while(1) in Flash, all peripherals ON, PLL from RCH8M to 40M IDD 8160 9470 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to 40M, FlashWait=1 55
IDD Run while(1) in Flash, all peripherals ON, PLL from RCH8M to 48M IDD 9670 11240 μA All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to 48M, FlashWait=1 55
IDD Run while(1) in Flash, all peripherals OFF, RCH 4M IDD 610 990 μA All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH 4M 55
IDD Run while(1) in Flash, all peripherals OFF, RCH 8M IDD 1090 1830 μA All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH 8M 55
IDD Run while(1) in Flash, all peripherals OFF, RCH 16M IDD 2080 3350 μA All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH 16M 55
IDD Run while(1) in Flash, all peripherals OFF, RCH 22.12M IDD 2770 4480 μA All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH 22.12M 55
IDD Run while(1) in Flash, all peripherals OFF, RCH 24M IDD 2970 4810 μA All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH 24M 55
IDD Run while(1) in Flash, all peripherals OFF, PLL from RCH4M to 16M IDD 2290 3150 μA All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to 16M 55
IDD Run while(1) in Flash, all peripherals OFF, PLL from RCH4M to 24M IDD 3060 4360 μA All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to 24M 55
IDD Run while(1) in Flash, all peripherals OFF, PLL from RCH4M to 32M IDD 3410 4020 μA All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to 32M, FlashWait=1 55
IDD Run while(1) in Flash, all peripherals OFF, PLL from RCH4M to 40M IDD 4110 4950 μA All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to 40M, FlashWait=1 55
Internal 2.5V / 1.5V reference temperature coefficient TCoeff 120 ppm/℃ -40 ~ 85°C 54

CAD (KiCad official)

  • Symbol: HC32L196JCTA-LQ48
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: hc32l196jcta-lq48-etched.step / hc32l196jcta-lq48-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hc32l196jcta-lq48.step / hc32l196jcta-lq48.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XHSC datasheet (98 pp, sha256 3664a76916c1dfdf, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF