component
HC32L176KATA-LQ64
Public Made by Adomby adom
XHSC Microcontrollers (MCU/MPU/SOC), LQFP-64(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
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| hc32l176kata-lq64-etched.glb | 8d ago |
| hc32l176kata-lq64-etched.step | 8d ago |
| hc32l176kata-lq64-hero.glb | 8d ago |
| hc32l176kata-lq64-hero.overlay.json | 8d ago |
| hc32l176kata-lq64.glb | 8d ago |
| hc32l176kata-lq64.kicad_mod | 8d ago |
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| README.md | 8d ago |
HC32L176KATA-LQ64
XHSC · Microcontrollers (MCU/MPU/SOC) · LQFP-64(7x7)
HC32L176KATA-LQ64 from XHSC, in a LQFP-64(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCAP | power_out | Internal LDO core-supply output for internal circuits only, requiring an external decoupling capacitor of at least 1 µF. |
| 2 | PC13 | bidirectional | GPIO with RTC_1HZ and TIM3_CH1B digital functions and LVD0 voltage-monitor input; reset state is high-impedance input with VIH ≥ 0.7VCC and VIL ≤ 0.3VCC. |
| 3 | PC14 | bidirectional | GPIO shared with XTLI, the low-speed external crystal input for the 32.768 kHz oscillator. |
| 4 | PC15 | output | GPIO shared with XTLO, the low-speed external crystal output for the 32.768 kHz oscillator. |
| 5 | PF00 | bidirectional | GPIO shared with XTHI, the high-speed external crystal input (4-32 MHz), also usable as I2C0_SDA and UART1_TXD. |
| 6 | PF01 | bidirectional | GPIO shared with XTHO, the high-speed external crystal output (4-32 MHz), also usable as I2C0_SCL, TIM4_CHB and UART1_RXD. |
| 7 | RESETB | input | Active-low reset input with CMOS thresholds (VIL ≤ 0.3VCC, VIH ≥ 0.7VCC) and an always-connected weak pull-up of about 80 kΩ. |
| 8 | PC00 | bidirectional | GPIO with SEG27 LCD segment, AIN10 ADC input, VC0_INP0 / VC1_INN0 comparator inputs and LPTIM_GATE/UART1_CTS/UART2_RTS digital functions. |
| 9 | PC01 | bidirectional | GPIO with SEG26 LCD segment, AIN11 ADC input, VC0_INP1 / VC1_INN1 comparator inputs and LPTIM_TOG/UART1_RTS digital functions. |
| 10 | PC02 | bidirectional | GPIO with SEG25 LCD segment, AIN12 ADC input, VC0_INP2 / VC1_INN2 comparator inputs and SPI1_MISO/UART2_RXD digital functions. |
| 11 | PC03 | bidirectional | GPIO with SEG24 LCD segment, AIN13 ADC input, VC0_INP3 / VC1_INN3 comparator inputs and SPI1_MOSI/UART2_TXD digital functions. |
| 12 | AVSS | power_in | Analog ground for the ADC, comparator, DAC and reference circuits. |
| 13 | AVCC | power_in | Analog supply, which must be at the same voltage as DVCC within the 1.8-5.5 V operating range. |
| 14 | PA00 | bidirectional | GPIO with SEG23 LCD segment, AIN0 ADC input, VC0_OUT comparator output and UART1_CTS/LPUART1_TXD/TIM0_ETR digital functions. |
| 15 | PA01 | bidirectional | GPIO with SEG22 LCD segment, AIN1 ADC input, VC0_INP5 comparator input and UART1_RTS/LPUART1_RXD/SPI1_MOSI digital functions. |
| 16 | PA02 | bidirectional | GPIO with SEG21 LCD segment, AIN2 ADC input, VC1_OUT comparator output and UART1_TXD/TIM0_CHA/SPI1_MISO digital functions. |
| 17 | PA03 | bidirectional | GPIO with SEG20 LCD segment, AIN3 ADC input, VC0_INP7 comparator input and UART1_RXD/TIM0_GATE/SPI1_CS digital functions. |
| 18 | PF04 | bidirectional | General-purpose GPIO pin on the LQFP64 package with no dedicated alternate function listed for this package. |
| 19 | PF05 | bidirectional | General-purpose GPIO pin on the LQFP64 package with no dedicated alternate function listed for this package. |
| 20 | PA04 | bidirectional | GPIO with SEG19 LCD segment, AIN4 ADC input, DAC_OUT and OPA_OUT0 analog outputs, and SPI0_CS/UART1_TXD/PCA_CH4 digital functions. |
| 21 | PA05 | bidirectional | GPIO with SEG18 LCD segment and SPI0_SCK/TIM0_ETR/PCA_ECI digital functions, also usable as XTL_OUT or XTH_OUT. |
| 22 | PA06 | bidirectional | GPIO with SEG17 LCD segment and SPI0_MISO/PCA_CH0/TIM3_BK digital functions, also usable as VC0_OUT or LPUART0_CTS. |
| 23 | PA07 | bidirectional | GPIO with SEG16 LCD segment and SPI0_MOSI/PCA_CH1/HCLK_OUT digital functions, also usable as VC1_OUT. |
| 24 | PC04 | bidirectional | GPIO with SEG15 LCD segment and LPUART0_TXD/TIM2_ETR/IR_OUT/VC2_OUT digital functions. |
| 25 | PC05 | bidirectional | GPIO with SEG14 LCD segment and LPUART0_RXD/TIM6_CHB/PCA_CH4 digital functions. |
| 26 | PB00 | bidirectional | GPIO with SEG13 LCD segment and PCA_CH2/TIM3_CH1B/LPUART0_TXD/TIM5_CHB digital functions. |
| 27 | PB01 | bidirectional | GPIO with SEG12 LCD segment and PCA_CH3/PCLK_OUT/TIM3_CH2B/LPUART0_RTS/VC2_OUT digital functions. |
| 28 | PB02 | bidirectional | GPIO with SEG11 LCD segment and LPTIM_TOG/PCA_ECI/LPUART1_TXD/TIM4_CHA digital functions. |
| 29 | PB10 | bidirectional | GPIO with SEG10 LCD segment and I2C1_SCL/SPI1_SCK/TIM1_CHA/LPUART0_TXD digital functions. |
| 30 | PB11 | bidirectional | GPIO with SEG9 LCD segment and I2C1_SDA/TIM1_CHB/LPUART0_RXD/TIM2_GATE digital functions. |
| 31 | DVSS | power_in | Digital ground, which must be connected to the system ground. |
| 32 | DVCC | power_in | Digital supply, which must be at the same voltage as AVCC within the 1.8-5.5 V operating range and decoupled close to the pin. |
| 33 | PB12 | bidirectional | GPIO with SEG8 LCD segment and SPI1_CS/TIM3_BK/LPUART0_TXD/TIM0_BK digital functions. |
| 34 | PB13 | bidirectional | GPIO with SEG7 LCD segment and SPI1_SCK/I2C1_SCL/TIM3_CH0B/LPUART0_CTS digital functions. |
| 35 | PB14 | bidirectional | GPIO with SEG6 LCD segment and SPI1_MISO/I2C1_SDA/TIM3_CH1B/RTC_1HZ digital functions. |
| 36 | PB15 | bidirectional | GPIO with SEG5 LCD segment and SPI1_MOSI/TIM3_CH2B/TIM0_CHB/LPUART1_RXD digital functions. |
| 37 | PC06 | bidirectional | GPIO with SEG4 LCD segment and PCA_CH0/TIM4_CHA/TIM2_CHA/UART3_RXD digital functions. |
| 38 | PC07 | bidirectional | GPIO with SEG3 LCD segment and PCA_CH1/TIM5_CHA/TIM2_CHB/UART3_TXD digital functions. |
| 39 | PC08 | bidirectional | GPIO with SEG2 LCD segment and PCA_CH2/TIM6_CHA/TIM2_ETR/UART3_CTS digital functions. |
| 40 | PC09 | bidirectional | GPIO with SEG1 LCD segment and PCA_CH3/TIM4_CHB/TIM1_ETR/UART3_RTS digital functions. |
| 41 | PA08 | bidirectional | GPIO with SEG0 LCD segment and UART0_TXD/TIM3_CH0A/TIM1_GATE/TIM4_CHA digital functions. |
| 42 | PA09 | bidirectional | GPIO with COM0 LCD common output and UART0_TXD/TIM3_CH1A/TIM0_BK/I2C0_SCL digital functions. |
| 43 | PA10 | bidirectional | GPIO with COM1 LCD common output and UART0_RXD/TIM3_CH2A/TIM2_BK/I2C0_SDA digital functions. |
| 44 | PA11 | bidirectional | GPIO with COM2 LCD common output and UART0_CTS/TIM3_GATE/I2C1_SCL/VC0_OUT digital functions. |
| 45 | PA12 | bidirectional | GPIO with COM3 LCD common output and UART0_RTS/TIM3_ETR/I2C1_SDA/VC1_OUT digital functions. |
| 46 | PA13 | bidirectional | GPIO shared with the SWDIO serial-wire debug data pin, also usable as IR_OUT, UART0_RXD and LVD_OUT. |
| 47 | PF06 | bidirectional | GPIO with I2C1_SCL, LPUART1_CTS and UART0_CTS alternate functions. |
| 48 | PF07 | bidirectional | GPIO with I2C1_SDA, LPUART1_RTS and UART0_RTS alternate functions. |
| 49 | PA14 | bidirectional | GPIO shared with the SWCLK serial-wire debug clock pin, also usable as UART1_TXD, UART0_TXD, TIM3_CH2A and RCH_OUT. |
| 50 | PA15 | bidirectional | GPIO with SPI0_CS, UART1_RXD, LPUART1_RTS, TIM0_ETR, TIM0_CHA and TIM3_CH1A alternate functions. |
| 51 | PC10 | bidirectional | GPIO with COM4 / SEG39 LCD outputs and LPUART1_TXD/LPUART0_TXD/PCA_CH2 digital functions. |
| 52 | PC11 | bidirectional | GPIO with COM5 / SEG38 LCD outputs and LPUART1_RXD/LPUART0_RXD/PCA_CH3/PCNT_S0FO digital functions. |
| 53 | PC12 | bidirectional | GPIO with COM6 / SEG37 LCD outputs and LPUART0_TXD/LPUART1_TXD/PCA_CH4/PCNT_S1FO digital functions. |
| 54 | PD02 | bidirectional | GPIO with COM7 / SEG36 LCD outputs and PCA_ECI/LPUART0_RTS/TIM1_ETR digital functions. |
| 55 | PB03 | bidirectional | GPIO with SEG35 LCD segment and VLCDH LCD voltage pin (external resistor/capacitor LCD modes), also usable as SPI0_SCK, TIM0_CHB and XTL_OUT. |
| 56 | PB04 | bidirectional | GPIO with SEG34 LCD segment and VLCD3 LCD voltage pin (external resistor/capacitor LCD modes), also usable as SPI0_MISO, PCA_CH0 and UART0_CTS. |
| 57 | PB05 | bidirectional | GPIO with SEG33 LCD segment and VLCD2 LCD voltage pin (external resistor/capacitor LCD modes), also usable as SPI0_MOSI, PCA_CH1 and UART0_RTS. |
| 58 | PB06 | bidirectional | GPIO with SEG32 LCD segment and VLCD1 LCD voltage pin (external resistor/capacitor LCD modes), also usable as I2C0_SCL, UART0_TXD and TIM1_CHB. |
| 59 | PB07 | bidirectional | GPIO with SEG31 LCD segment, also usable as I2C0_SDA, UART0_RXD, TIM2_CHB and LPUART1_CTS. |
| 60 | BOOT0 | input | Boot-mode select pin, read at reset: high selects ISP programming mode and low selects user mode with SWD programming; the text identifies this pin as PF11. |
| 61 | PB08 | bidirectional | GPIO with SEG29 LCD segment and I2C0_SCL/TIM1_CHA/TIM2_CHA/TIM0_GATE/UART0_TXD digital functions. |
| 62 | PB09 | bidirectional | GPIO with SEG28 LCD segment and I2C0_SDA/IR_OUT/SPI1_CS/TIM2_CHA/TIM2_CHB/UART0_RXD digital functions. |
| 63 | DVSS | power_in | Digital ground, which must be connected to the system ground. |
| 64 | DVCC | power_in | Digital supply, which must be at the same voltage as AVCC within the 1.8-5.5 V operating range and decoupled close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XHSC |
| Package | LQFP-64(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| External main supply voltage (VCC, incl. AVCC and DVCC) | VCC - VSS | -0.3 | 5.5 | V | 49 | ||
| Voltage difference between different supply pins | /ΔVCCx/ | 50 | mV | 49 | |||
| Voltage difference between different ground pins | /VSSx - VSS/ | 50 | mV | 49 | |||
| Total current through DVCC/AVCC supply lines (supply current) | IVCC | 300 | mA | 49 | |||
| Total current through VSS ground lines (sink current) | IVSS | 300 | mA | 49 | |||
| Output sink current on any I/O and control pin | IIO | 25 | mA | 49 | |||
| Output current on any I/O and control pin | IIO | -25 | mA | 49 | |||
| Injection current on RESETB pin | IINJ(PIN) | -5 | 5 | mA | 49 | ||
| Injection current on XTHI pin of XTH and XTLI pin of XTL | IINJ(PIN) | -5 | 5 | mA | 49 | ||
| Injection current on other pins | IINJ(PIN) | -5 | 5 | mA | 49 | ||
| Total injection current on all I/O and control pins | ∑IINJ(PIN) | -25 | 25 | mA | 49 | ||
| External input voltage range | Vex | 0 | V | 53 | |||
| LVD detection threshold tolerance (all LVD_CR.VTDS settings) | Vlevel | -3.5 | 3.5 | % | LVD_CR.VTDS=0000 to 1111 (nominal 1.8 V to 3.3 V) | 53 | |
| Internal 2.5V Reference Voltage | VREF25 | 2.475 | 2.5 | 2.525 | V | 常温25°C 3.3V | 54 |
| Internal 2.5V Reference Voltage | VREF25 | 2.463 | 2.5 | 2.525 | V | -40 |
54 |
| Internal 1.5V Reference Voltage | VREF15 | 1.485 | 1.5 | 1.515 | V | 常温25°C 3.3V | 54 |
| Internal 1.5V Reference Voltage | VREF15 | 1.477 | 1.5 | 1.519 | V | -40 |
54 |
| Operating supply voltage (product features) | 1.8 | 5.5 | V | 1 | |||
| Operating temperature range (product features) | -40 | 85 | °C | 1 | |||
| IDD (Run mode, peripherals ON) | IDD | 1000 | 1430 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, RCH clock source 4M | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 1890 | 2710 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, RCH clock source 8M | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 3710 | 5160 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, RCH clock source 16M | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 5010 | 7000 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, RCH clock source 22.12M | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 5400 | 7570 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, RCH clock source 24M | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 3930 | 4990 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH4M to xxM clock source, 16M | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 5480 | 7080 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH4M to xxM clock source, 24M | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 6590 | 7640 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH4M to xxM clock source, 32M, FlashWait=1 | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 8100 | 9470 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH4M to xxM clock source, 40M, FlashWait=1 | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 9610 | 11200 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH4M to xxM clock source, 48M, FlashWait=1 | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 3990 | 5030 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH8M to xxM clock source, 16M | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 5530 | 7130 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH8M to xxM clock source, 24M | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 6640 | 7680 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH8M to xxM clock source, 32M, FlashWait=1 | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 8160 | 9470 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH8M to xxM clock source, 40M, FlashWait=1 | 55 | |
| IDD (Run mode, peripherals ON) | IDD | 9670 | 11240 | μA | All peripherals clock ON, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH8M to xxM clock source, 48M, FlashWait=1 | 55 | |
| IDD (Run mode, peripherals OFF) | IDD | 610 | 990 | μA | All peripherals clock OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, RCH clock source 4M | 55 | |
| IDD (Run mode, peripherals OFF) | IDD | 1090 | 1830 | μA | All peripherals clock OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, RCH clock source 8M | 55 | |
| IDD (Run mode, peripherals OFF) | IDD | 2080 | 3350 | μA | All peripherals clock OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, RCH clock source 16M | 55 | |
| IDD (Run mode, peripherals OFF) | IDD | 2770 | 4480 | μA | All peripherals clock OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, RCH clock source 22.12M | 55 | |
| IDD (Run mode, peripherals OFF) | IDD | 2970 | 4810 | μA | All peripherals clock OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, RCH clock source 24M | 55 | |
| IDD (Run mode, peripherals OFF) | IDD | 2290 | 3150 | μA | All peripherals clock OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH4M to xxM clock source, 16M | 55 | |
| IDD (Run mode, peripherals OFF) | IDD | 3060 | 4360 | μA | All peripherals clock OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH4M to xxM clock source, 24M | 55 | |
| IDD (Run mode, peripherals OFF) | IDD | 3410 | 4020 | μA | All peripherals clock OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH4M to xxM clock source, 32M, FlashWait=1 | 55 | |
| IDD (Run mode, peripherals OFF) | IDD | 4110 | 4950 | μA | All peripherals clock OFF, Run while(1) in Flash, VCAP=1.5V, VCC=1.8-5.5V, TA=-40 to 85°C, PLL RCH4M to xxM clock source, 40M, FlashWait=1 | 55 |
CAD (KiCad official)
- Symbol:
HC32L176KATA-LQ64 - Footprint:
Package_QFP:LQFP-64_7x7mm_P0.4mm - 3D model: LQFP-64(7x7) (KiCad packages3D, STEP)
- 3D model files:
hc32l176kata-lq64-etched.step/hc32l176kata-lq64-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hc32l176kata-lq64.step/hc32l176kata-lq64.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XHSC datasheet (98 pp, sha256
566056c166174c9d, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).