component
HC32L136J8TA-LQ48
Public Made by Adomby adom
XHSC Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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HC32L136J8TA-LQ48
XHSC · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
HC32L136J8TA-LQ48 from XHSC, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCAP | power_out | Internal LDO core-supply output that is for internal circuits only and needs an external decoupling capacitor of at least 1 µF. |
| 2 | PC13 | bidirectional | General-purpose I/O with RTC_1HZ and TIM3_CH1B alternate functions, also usable as the LVD_IN0 voltage-detect input. |
| 3 | XTLI/PC14 | input | Low-speed 32.768 kHz crystal oscillator input (XTLI), shared with GPIO PC14; load capacitors must follow the crystal manufacturer's specification. |
| 4 | XTLO/PC15 | output | Low-speed 32.768 kHz crystal oscillator output (XTLO), shared with GPIO PC15. |
| 5 | XTHI/PD00 | input | High-speed 4-32 MHz crystal/resonator oscillator input (XTHI), shared with GPIO PD00 (I2C0_SDA, UART1_TXD). |
| 6 | XTHO/PD01 | output | High-speed 4-32 MHz crystal/resonator oscillator output (XTHO), shared with GPIO PD01 (I2C0_SCL, TIM4_CHB, UART1_RXD). |
| 7 | RESETB | input | Active-low reset input with CMOS Schmitt trigger, an always-connected pull-up of about 80 kΩ, VIL max 0.3VCC, VIH min 0.7VCC, and filtering of pulses shorter than 100 ns. |
| 8 | AVSS | power_in | Analog ground, which must be connected to the system ground. |
| 9 | AVCC | power_in | Analog supply, 1.8-5.5 V, which must be the same voltage as DVCC (at most 300 mV difference during power-up and operation). |
| 10 | SEG23/PA00 | bidirectional | GPIO PA00 with AIN0 and VC0/VC1 analog inputs and LCD SEG23, plus UART1_CTS, LPUART1_TXD, TIM0_ETR and VC0_OUT alternate functions. |
| 11 | SEG22/PA01 | bidirectional | GPIO PA01 with AIN1 and VC0/VC1 analog inputs and LCD SEG22, plus UART1_RTS, LPUART1_RXD, SPI1_MOSI and HCLK_OUT alternate functions. |
| 12 | SEG21/PA02 | bidirectional | GPIO PA02 with AIN2 and VC0/VC1 analog inputs and LCD SEG21, plus UART1_TXD, SPI1_MISO, VC1_OUT and PCLK_OUT alternate functions. |
| 13 | SEG20/PA03 | bidirectional | GPIO PA03 with AIN3 and VC0/VC1 analog inputs and LCD SEG20, plus UART1_RXD, SPI1_CS and timer alternate functions. |
| 14 | SEG19/PA04 | bidirectional | GPIO PA04 with AIN4 and VC0/VC1 analog inputs and LCD SEG19, plus SPI0_CS, UART1_TXD, PCA_CH4 and LVD_OUT alternate functions. |
| 15 | PA05/SEG18 | bidirectional | GPIO PA05 with LCD SEG18, plus SPI0_SCK, TIM0_ETR, PCA_ECI and XTL_OUT/XTH_OUT alternate functions. |
| 16 | PA06/SEG17 | bidirectional | GPIO PA06 with LCD SEG17, plus SPI0_MISO, PCA_CH0, TIM3_BK and LPUART0_CTS alternate functions. |
| 17 | PA07/SEG16 | bidirectional | GPIO PA07 with LCD SEG16, plus SPI0_MOSI, PCA_CH1, HCLK_OUT and VC1_OUT alternate functions. |
| 18 | PB00/SEG13 | bidirectional | GPIO PB00 with LCD SEG13, plus PCA_CH2, TIM3_CH1B, LPUART0_TXD and RCH_OUT/RCL_OUT/PLL_OUT alternate functions. |
| 19 | PB01/SEG12 | bidirectional | GPIO PB01 with LCD SEG12, plus PCA_CH3, PCLK_OUT, TIM3_CH2B, TIM6_CHB and LPUART0_RTS alternate functions. |
| 20 | PB02/SEG11 | bidirectional | GPIO PB02 with LCD SEG11, plus LPTIM_TOG, PCA_ECI, LPUART1_TXD, TIM4_CHA and BK inputs of TIM0/1/2. |
| 21 | PB10/SEG10 | bidirectional | GPIO PB10 with LCD SEG10, plus I2C1_SCL, SPI1_SCK, TIM1_CHA, LPUART0_TXD, LPUART1_RTS and UART1_RTS alternate functions. |
| 22 | PB11/SEG9 | bidirectional | GPIO PB11 with LCD SEG9, plus I2C1_SDA, TIM1_CHB, LPUART0_RXD, LPUART1_CTS and UART1_CTS alternate functions. |
| 23 | DVSS | power_in | Digital ground (VSS reference for all voltages). |
| 24 | DVCC | power_in | Digital supply, 1.8-5.5 V, which must be the same voltage as AVCC. |
| 25 | PB12/SEG8 | bidirectional | GPIO PB12 with LCD SEG8, plus SPI1_CS, TIM3_BK, LPUART0_TXD, LPUART0_RTS and TIM6_CHA alternate functions. |
| 26 | PB13/SEG7 | bidirectional | GPIO PB13 with LCD SEG7, plus SPI1_SCK, I2C1_SCL, LPUART0_CTS, TIM1_CHA and TIM6_CHB alternate functions. |
| 27 | PB14/SEG6 | bidirectional | GPIO PB14 with LCD SEG6, plus SPI1_MISO, I2C1_SDA, TIM0_CHA, RTC_1HZ and LPUART0_RTS alternate functions. |
| 28 | PB15/SEG5 | bidirectional | GPIO PB15 with LCD SEG5, plus SPI1_MOSI, TIM3_CH2B, TIM0_CHB, TIM0_GATE and LPUART1_RXD alternate functions. |
| 29 | PA08/SEG0 | bidirectional | GPIO PA08 with LCD SEG0, plus UART0_TXD, TIM3_CH0A, TIM1_GATE, TIM4_CHA and TIM3_BK alternate functions. |
| 30 | PA09/COM0 | bidirectional | GPIO PA09 with LCD common output COM0, plus UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT and TIM5_CHA alternate functions. |
| 31 | PA10/COM1 | bidirectional | GPIO PA10 with LCD common output COM1, plus UART0_RXD, TIM3_CH2A, TIM2_BK, I2C0_SDA, PCLK_OUT and TIM6_CHA alternate functions. |
| 32 | PA11/COM2 | bidirectional | GPIO PA11 with LCD common output COM2, plus UART0_CTS, TIM3_GATE, I2C1_SCL, VC0_OUT and SPI0_MISO alternate functions. |
| 33 | PA12/COM3 | bidirectional | GPIO PA12 with LCD common output COM3, plus UART0_RTS, TIM3_ETR, I2C1_SDA, VC1_OUT, SPI0_MOSI and PCNT_S0 alternate functions. |
| 34 | PA13/SWDIO | bidirectional | GPIO PA13 used as the SWD data pin (SWDIO) for debug and as an ISP programming pin, plus IR_OUT, UART0_RXD, LVD_OUT and PCNT_S1 alternate functions. |
| 35 | PD06 | bidirectional | GPIO PD06 with I2C1_SCL, LPUART1_CTS and UART0_CTS alternate functions. |
| 36 | PD07 | bidirectional | GPIO PD07 with I2C1_SDA, LPUART1_RTS and UART0_RTS alternate functions. |
| 37 | PA14/SWCLK | input | SWD clock input (SWCLK) shared with GPIO PA14, which also offers UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH_OUT, RCL_OUT and PLL_OUT alternate functions. |
| 38 | PA15 | bidirectional | GPIO PA15 with SPI0_CS, UART1_RXD, LPUART1_RTS, TIM0_ETR, TIM0_CHA and TIM3_CH1A alternate functions. |
| 39 | PB03/SEG35/VLCDH | bidirectional | GPIO PB03 with LCD SEG35 and VLCDH LCD-voltage pin (used in external resistor or capacitor modes), plus SPI0_SCK, TIM0_CHB, LPTIM_GATE and XTL_OUT/XTH_OUT alternate functions. |
| 40 | PB04/SEG34/VLCD3 | bidirectional | GPIO PB04 with LCD SEG34 and VLCD3 LCD-voltage pin (used in external resistor or capacitor modes), plus SPI0_MISO, PCA_CH0, UART0_CTS and LPTIM_ETR alternate functions. |
| 41 | PB05/SEG33/VLCD2 | bidirectional | GPIO PB05 with LCD SEG33 and VLCD2 LCD-voltage pin (used in external resistor or capacitor modes), plus SPI0_MOSI, TIM1_BK, PCA_CH1, PCNT_S0 and UART0_RTS alternate functions. |
| 42 | PB06/SEG32/VLCD1 | bidirectional | GPIO PB06 with LCD SEG32 and VLCD1 LCD-voltage pin (used in external resistor or capacitor modes), plus I2C0_SCL, UART0_TXD, TIM1_CHB, TIM0_CHA and LPTIM_ETR alternate functions. |
| 43 | PB07/SEG31 | bidirectional | GPIO PB07 with LCD SEG31 and LVD_IN2 voltage-detect input, plus I2C0_SDA, UART0_RXD, TIM2_CHB, LPUART1_CTS and PCNT_S1 alternate functions. |
| 44 | BOOT0 | input | BOOT0 pin sampled at reset: high selects ISP programming mode, low selects user mode that runs Flash code and allows SWD programming; the port is PD03 with LCD SEG30 in the datasheet's pin table. |
| 45 | PB08/SEG29 | bidirectional | GPIO PB08 with LCD SEG29 and LVD_IN1 voltage-detect input, plus I2C0_SCL, TIM1_CHA, TIM2_CHA, TIM0_GATE, TIM3_CH2A and UART0_TXD alternate functions. |
| 46 | PB09/SEG28 | bidirectional | GPIO PB09 with LCD SEG28, plus I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA, TIM2_CHB and UART0_RXD alternate functions. |
| 47 | DVSS | power_in | Digital ground (VSS reference for all voltages). |
| 48 | DVCC | power_in | Digital supply, 1.8-5.5 V, which must be the same voltage as AVCC. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XHSC |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| External main supply voltage (VCC - VSS, incl. AVCC and DVCC) | VCC - VSS | -0.3 | 5.5 | V | 44 | ||
| Voltage difference between different supply pins | /ΔVCCx/ | 50 | mV | 44 | |||
| Voltage difference between different ground pins | /VSSx - VSS/ | 50 | mV | 44 | |||
| Total current through DVCC/AVCC supply lines (supply current) | IVCC | 300 | mA | 44 | |||
| Total current through VSS ground lines (sink current) | IVSS | 300 | mA | 44 | |||
| Output sink current on any I/O and control pin | IIO | 25 | mA | 44 | |||
| Output current on any I/O and control pin | IIO | -25 | mA | 44 | |||
| Injection current on RESETB pin | IINJ(PIN) | -5 | 5 | mA | 44 | ||
| Injection current on XTHI pin of XTH and XTLI pin of XTL | IINJ(PIN) | -5 | 5 | mA | 44 | ||
| Injection current on other pins | IINJ(PIN) | -5 | 5 | mA | 44 | ||
| Total injection current on all I/O and control pins | ∑IINJ(PIN) | -25 | 25 | mA | 44 | ||
| Storage temperature range | TSTG | -60 | 150 | ℃ | 44 | ||
| Maximum junction temperature | TJ | 105 | ℃ | 44 | |||
| Operating supply voltage (product feature summary: 工作条件) | 1.8 | 5.5 | V | 1 | |||
| Operating temperature range (product feature summary: 工作条件) | -40 | 85 | ℃ | 1 | |||
| External input voltage range (LVD) | Vex | 0 | V | 47 | |||
| LVD detection threshold | Vlevel | 1.7 | 1.8 | 1.9 | V | LVD_CR.VTDS=0000 | 47 |
| LVD detection threshold | Vlevel | 1.8 | 1.9 | 2 | V | LVD_CR.VTDS=0001 | 47 |
| LVD detection threshold | Vlevel | 1.9 | 2 | 2.1 | V | LVD_CR.VTDS=0010 | 47 |
| LVD detection threshold | Vlevel | 2 | 2.1 | 2.2 | V | LVD_CR.VTDS=0011 | 47 |
| LVD detection threshold | Vlevel | 2.1 | 2.2 | 2.3 | V | LVD_CR.VTDS=0100 | 47 |
| LVD detection threshold | Vlevel | 2.2 | 2.3 | 2.4 | V | LVD_CR.VTDS=0101 | 47 |
| LVD detection threshold | Vlevel | 2.3 | 2.4 | 2.5 | V | LVD_CR.VTDS=0110 | 47 |
| LVD detection threshold | Vlevel | 2.4 | 2.5 | 2.6 | V | LVD_CR.VTDS=0111 | 47 |
| LVD detection threshold | Vlevel | 2.5 | 2.6 | 2.7 | V | LVD_CR.VTDS=1000 | 47 |
| LVD detection threshold | Vlevel | 2.6 | 2.7 | 2.8 | V | LVD_CR.VTDS=1001 | 47 |
| LVD detection threshold | Vlevel | 2.7 | 2.8 | 2.9 | V | LVD_CR.VTDS=1010 | 47 |
| LVD detection threshold | Vlevel | 2.8 | 2.9 | 3 | V | LVD_CR.VTDS=1011 | 47 |
| LVD detection threshold | Vlevel | 2.9 | 3 | 3.1 | V | LVD_CR.VTDS=1100 | 47 |
| LVD detection threshold | Vlevel | 3 | 3.1 | 3.2 | V | LVD_CR.VTDS=1101 | 47 |
| LVD detection threshold | Vlevel | 3.1 | 3.2 | 3.3 | V | LVD_CR.VTDS=1110 | 47 |
| LVD detection threshold | Vlevel | 3.2 | 3.3 | 3.4 | V | LVD_CR.VTDS=1111 | 47 |
| Internal 2.5V Reference Voltage | VREF25 | 2.475 | 2.5 | 2.525 | V | 常温25°C 3.3V | 48 |
| Internal 2.5V Reference Voltage | VREF25 | 2.463 | 2.5 | 2.525 | V | -40 |
48 |
| Internal 1.5V Reference Voltage | VREF15 | 1.485 | 1.5 | 1.515 | V | 常温25°C 3.3V | 48 |
| Internal 1.5V Reference Voltage | VREF15 | 1.477 | 1.5 | 1.519 | V | -40 |
48 |
| Internal 2.5V 1.5V temperature coefficient | TCoeff | 120 | ppm/°C | -40 ~ 85°C | 48 | ||
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, RCH clock source) | IDD | 1000 | 1300 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 4M | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, RCH clock source) | IDD | 1910 | 2420 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 8M | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, RCH clock source) | IDD | 3650 | 4590 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 16M | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, RCH clock source) | IDD | 5080 | 6330 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 22.12M | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, RCH clock source) | IDD | 5440 | 6820 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 24M | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH4M) | IDD | 3960 | 4850 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 16M | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH4M) | IDD | 5700 | 7000 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 24M | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH4M) | IDD | 6600 | 7480 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 32M FlashWait=1 | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH4M) | IDD | 8140 | 9190 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 40M FlashWait=1 | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH4M) | IDD | 9550 | 10860 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 48M FlashWait=1 | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH8M) | IDD | 4030 | 4940 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to xxM clock source; 16M | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH8M) | IDD | 5780 | 7060 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to xxM clock source; 24M | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH8M) | IDD | 6670 | 7560 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to xxM clock source; 32M FlashWait=1 | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH8M) | IDD | 8240 | 9340 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to xxM clock source; 40M FlashWait=1 | 49 | |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH8M) | IDD | 9630 | 10970 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to xxM clock source; 48M FlashWait=1 | 49 | |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, RCH clock source) | IDD | 610 | 875 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 4M | 49 | |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, RCH clock source) | IDD | 1330 | 1570 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 8M | 49 | |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, RCH clock source) | IDD | 2110 | 2900 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 16M | 49 | |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, RCH clock source) | IDD | 2860 | 3860 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 22.12M | 49 | |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, RCH clock source) | IDD | 3060 | 4120 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 24M | 49 | |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, PLL RCH4M) | IDD | 2360 | 3110 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 16M | 49 | |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, PLL RCH4M) | IDD | 3360 | 4330 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 24M | 49 | |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, PLL RCH4M) | IDD | 3490 | 4010 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 32M FlashWait=1 | 49 |
CAD (KiCad official)
- Symbol:
HC32L136J8TA-LQ48 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
hc32l136j8ta-lq48-etched.step/hc32l136j8ta-lq48-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hc32l136j8ta-lq48.step/hc32l136j8ta-lq48.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XHSC datasheet (90 pp, sha256
863554b2ffdb4447, retrieved 2026-10-16, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HC32L136J8TA-LQ48
**XHSC** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
HC32L136J8TA-LQ48 from XHSC, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCAP | power_out | Internal LDO core-supply output that is for internal circuits only and needs an external decoupling capacitor of at least 1 µF. |
| 2 | PC13 | bidirectional | General-purpose I/O with RTC_1HZ and TIM3_CH1B alternate functions, also usable as the LVD_IN0 voltage-detect input. |
| 3 | XTLI/PC14 | input | Low-speed 32.768 kHz crystal oscillator input (XTLI), shared with GPIO PC14; load capacitors must follow the crystal manufacturer's specification. |
| 4 | XTLO/PC15 | output | Low-speed 32.768 kHz crystal oscillator output (XTLO), shared with GPIO PC15. |
| 5 | XTHI/PD00 | input | High-speed 4-32 MHz crystal/resonator oscillator input (XTHI), shared with GPIO PD00 (I2C0_SDA, UART1_TXD). |
| 6 | XTHO/PD01 | output | High-speed 4-32 MHz crystal/resonator oscillator output (XTHO), shared with GPIO PD01 (I2C0_SCL, TIM4_CHB, UART1_RXD). |
| 7 | RESETB | input | Active-low reset input with CMOS Schmitt trigger, an always-connected pull-up of about 80 kΩ, VIL max 0.3VCC, VIH min 0.7VCC, and filtering of pulses shorter than 100 ns. |
| 8 | AVSS | power_in | Analog ground, which must be connected to the system ground. |
| 9 | AVCC | power_in | Analog supply, 1.8-5.5 V, which must be the same voltage as DVCC (at most 300 mV difference during power-up and operation). |
| 10 | SEG23/PA00 | bidirectional | GPIO PA00 with AIN0 and VC0/VC1 analog inputs and LCD SEG23, plus UART1_CTS, LPUART1_TXD, TIM0_ETR and VC0_OUT alternate functions. |
| 11 | SEG22/PA01 | bidirectional | GPIO PA01 with AIN1 and VC0/VC1 analog inputs and LCD SEG22, plus UART1_RTS, LPUART1_RXD, SPI1_MOSI and HCLK_OUT alternate functions. |
| 12 | SEG21/PA02 | bidirectional | GPIO PA02 with AIN2 and VC0/VC1 analog inputs and LCD SEG21, plus UART1_TXD, SPI1_MISO, VC1_OUT and PCLK_OUT alternate functions. |
| 13 | SEG20/PA03 | bidirectional | GPIO PA03 with AIN3 and VC0/VC1 analog inputs and LCD SEG20, plus UART1_RXD, SPI1_CS and timer alternate functions. |
| 14 | SEG19/PA04 | bidirectional | GPIO PA04 with AIN4 and VC0/VC1 analog inputs and LCD SEG19, plus SPI0_CS, UART1_TXD, PCA_CH4 and LVD_OUT alternate functions. |
| 15 | PA05/SEG18 | bidirectional | GPIO PA05 with LCD SEG18, plus SPI0_SCK, TIM0_ETR, PCA_ECI and XTL_OUT/XTH_OUT alternate functions. |
| 16 | PA06/SEG17 | bidirectional | GPIO PA06 with LCD SEG17, plus SPI0_MISO, PCA_CH0, TIM3_BK and LPUART0_CTS alternate functions. |
| 17 | PA07/SEG16 | bidirectional | GPIO PA07 with LCD SEG16, plus SPI0_MOSI, PCA_CH1, HCLK_OUT and VC1_OUT alternate functions. |
| 18 | PB00/SEG13 | bidirectional | GPIO PB00 with LCD SEG13, plus PCA_CH2, TIM3_CH1B, LPUART0_TXD and RCH_OUT/RCL_OUT/PLL_OUT alternate functions. |
| 19 | PB01/SEG12 | bidirectional | GPIO PB01 with LCD SEG12, plus PCA_CH3, PCLK_OUT, TIM3_CH2B, TIM6_CHB and LPUART0_RTS alternate functions. |
| 20 | PB02/SEG11 | bidirectional | GPIO PB02 with LCD SEG11, plus LPTIM_TOG, PCA_ECI, LPUART1_TXD, TIM4_CHA and BK inputs of TIM0/1/2. |
| 21 | PB10/SEG10 | bidirectional | GPIO PB10 with LCD SEG10, plus I2C1_SCL, SPI1_SCK, TIM1_CHA, LPUART0_TXD, LPUART1_RTS and UART1_RTS alternate functions. |
| 22 | PB11/SEG9 | bidirectional | GPIO PB11 with LCD SEG9, plus I2C1_SDA, TIM1_CHB, LPUART0_RXD, LPUART1_CTS and UART1_CTS alternate functions. |
| 23 | DVSS | power_in | Digital ground (VSS reference for all voltages). |
| 24 | DVCC | power_in | Digital supply, 1.8-5.5 V, which must be the same voltage as AVCC. |
| 25 | PB12/SEG8 | bidirectional | GPIO PB12 with LCD SEG8, plus SPI1_CS, TIM3_BK, LPUART0_TXD, LPUART0_RTS and TIM6_CHA alternate functions. |
| 26 | PB13/SEG7 | bidirectional | GPIO PB13 with LCD SEG7, plus SPI1_SCK, I2C1_SCL, LPUART0_CTS, TIM1_CHA and TIM6_CHB alternate functions. |
| 27 | PB14/SEG6 | bidirectional | GPIO PB14 with LCD SEG6, plus SPI1_MISO, I2C1_SDA, TIM0_CHA, RTC_1HZ and LPUART0_RTS alternate functions. |
| 28 | PB15/SEG5 | bidirectional | GPIO PB15 with LCD SEG5, plus SPI1_MOSI, TIM3_CH2B, TIM0_CHB, TIM0_GATE and LPUART1_RXD alternate functions. |
| 29 | PA08/SEG0 | bidirectional | GPIO PA08 with LCD SEG0, plus UART0_TXD, TIM3_CH0A, TIM1_GATE, TIM4_CHA and TIM3_BK alternate functions. |
| 30 | PA09/COM0 | bidirectional | GPIO PA09 with LCD common output COM0, plus UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT and TIM5_CHA alternate functions. |
| 31 | PA10/COM1 | bidirectional | GPIO PA10 with LCD common output COM1, plus UART0_RXD, TIM3_CH2A, TIM2_BK, I2C0_SDA, PCLK_OUT and TIM6_CHA alternate functions. |
| 32 | PA11/COM2 | bidirectional | GPIO PA11 with LCD common output COM2, plus UART0_CTS, TIM3_GATE, I2C1_SCL, VC0_OUT and SPI0_MISO alternate functions. |
| 33 | PA12/COM3 | bidirectional | GPIO PA12 with LCD common output COM3, plus UART0_RTS, TIM3_ETR, I2C1_SDA, VC1_OUT, SPI0_MOSI and PCNT_S0 alternate functions. |
| 34 | PA13/SWDIO | bidirectional | GPIO PA13 used as the SWD data pin (SWDIO) for debug and as an ISP programming pin, plus IR_OUT, UART0_RXD, LVD_OUT and PCNT_S1 alternate functions. |
| 35 | PD06 | bidirectional | GPIO PD06 with I2C1_SCL, LPUART1_CTS and UART0_CTS alternate functions. |
| 36 | PD07 | bidirectional | GPIO PD07 with I2C1_SDA, LPUART1_RTS and UART0_RTS alternate functions. |
| 37 | PA14/SWCLK | input | SWD clock input (SWCLK) shared with GPIO PA14, which also offers UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH_OUT, RCL_OUT and PLL_OUT alternate functions. |
| 38 | PA15 | bidirectional | GPIO PA15 with SPI0_CS, UART1_RXD, LPUART1_RTS, TIM0_ETR, TIM0_CHA and TIM3_CH1A alternate functions. |
| 39 | PB03/SEG35/VLCDH | bidirectional | GPIO PB03 with LCD SEG35 and VLCDH LCD-voltage pin (used in external resistor or capacitor modes), plus SPI0_SCK, TIM0_CHB, LPTIM_GATE and XTL_OUT/XTH_OUT alternate functions. |
| 40 | PB04/SEG34/VLCD3 | bidirectional | GPIO PB04 with LCD SEG34 and VLCD3 LCD-voltage pin (used in external resistor or capacitor modes), plus SPI0_MISO, PCA_CH0, UART0_CTS and LPTIM_ETR alternate functions. |
| 41 | PB05/SEG33/VLCD2 | bidirectional | GPIO PB05 with LCD SEG33 and VLCD2 LCD-voltage pin (used in external resistor or capacitor modes), plus SPI0_MOSI, TIM1_BK, PCA_CH1, PCNT_S0 and UART0_RTS alternate functions. |
| 42 | PB06/SEG32/VLCD1 | bidirectional | GPIO PB06 with LCD SEG32 and VLCD1 LCD-voltage pin (used in external resistor or capacitor modes), plus I2C0_SCL, UART0_TXD, TIM1_CHB, TIM0_CHA and LPTIM_ETR alternate functions. |
| 43 | PB07/SEG31 | bidirectional | GPIO PB07 with LCD SEG31 and LVD_IN2 voltage-detect input, plus I2C0_SDA, UART0_RXD, TIM2_CHB, LPUART1_CTS and PCNT_S1 alternate functions. |
| 44 | BOOT0 | input | BOOT0 pin sampled at reset: high selects ISP programming mode, low selects user mode that runs Flash code and allows SWD programming; the port is PD03 with LCD SEG30 in the datasheet's pin table. |
| 45 | PB08/SEG29 | bidirectional | GPIO PB08 with LCD SEG29 and LVD_IN1 voltage-detect input, plus I2C0_SCL, TIM1_CHA, TIM2_CHA, TIM0_GATE, TIM3_CH2A and UART0_TXD alternate functions. |
| 46 | PB09/SEG28 | bidirectional | GPIO PB09 with LCD SEG28, plus I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA, TIM2_CHB and UART0_RXD alternate functions. |
| 47 | DVSS | power_in | Digital ground (VSS reference for all voltages). |
| 48 | DVCC | power_in | Digital supply, 1.8-5.5 V, which must be the same voltage as AVCC. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XHSC |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| External main supply voltage (VCC - VSS, incl. AVCC and DVCC) | VCC - VSS | -0.3 | | 5.5 | V | | 44 |
| Voltage difference between different supply pins | /ΔVCCx/ | | | 50 | mV | | 44 |
| Voltage difference between different ground pins | /VSSx - VSS/ | | | 50 | mV | | 44 |
| Total current through DVCC/AVCC supply lines (supply current) | IVCC | | | 300 | mA | | 44 |
| Total current through VSS ground lines (sink current) | IVSS | | | 300 | mA | | 44 |
| Output sink current on any I/O and control pin | IIO | | | 25 | mA | | 44 |
| Output current on any I/O and control pin | IIO | | | -25 | mA | | 44 |
| Injection current on RESETB pin | IINJ(PIN) | -5 | | 5 | mA | | 44 |
| Injection current on XTHI pin of XTH and XTLI pin of XTL | IINJ(PIN) | -5 | | 5 | mA | | 44 |
| Injection current on other pins | IINJ(PIN) | -5 | | 5 | mA | | 44 |
| Total injection current on all I/O and control pins | ∑IINJ(PIN) | -25 | | 25 | mA | | 44 |
| Storage temperature range | TSTG | -60 | | 150 | ℃ | | 44 |
| Maximum junction temperature | TJ | | | 105 | ℃ | | 44 |
| Operating supply voltage (product feature summary: 工作条件) | | 1.8 | | 5.5 | V | | 1 |
| Operating temperature range (product feature summary: 工作条件) | | -40 | | 85 | ℃ | | 1 |
| External input voltage range (LVD) | Vex | 0 | | | V | | 47 |
| LVD detection threshold | Vlevel | 1.7 | 1.8 | 1.9 | V | LVD_CR.VTDS=0000 | 47 |
| LVD detection threshold | Vlevel | 1.8 | 1.9 | 2 | V | LVD_CR.VTDS=0001 | 47 |
| LVD detection threshold | Vlevel | 1.9 | 2 | 2.1 | V | LVD_CR.VTDS=0010 | 47 |
| LVD detection threshold | Vlevel | 2 | 2.1 | 2.2 | V | LVD_CR.VTDS=0011 | 47 |
| LVD detection threshold | Vlevel | 2.1 | 2.2 | 2.3 | V | LVD_CR.VTDS=0100 | 47 |
| LVD detection threshold | Vlevel | 2.2 | 2.3 | 2.4 | V | LVD_CR.VTDS=0101 | 47 |
| LVD detection threshold | Vlevel | 2.3 | 2.4 | 2.5 | V | LVD_CR.VTDS=0110 | 47 |
| LVD detection threshold | Vlevel | 2.4 | 2.5 | 2.6 | V | LVD_CR.VTDS=0111 | 47 |
| LVD detection threshold | Vlevel | 2.5 | 2.6 | 2.7 | V | LVD_CR.VTDS=1000 | 47 |
| LVD detection threshold | Vlevel | 2.6 | 2.7 | 2.8 | V | LVD_CR.VTDS=1001 | 47 |
| LVD detection threshold | Vlevel | 2.7 | 2.8 | 2.9 | V | LVD_CR.VTDS=1010 | 47 |
| LVD detection threshold | Vlevel | 2.8 | 2.9 | 3 | V | LVD_CR.VTDS=1011 | 47 |
| LVD detection threshold | Vlevel | 2.9 | 3 | 3.1 | V | LVD_CR.VTDS=1100 | 47 |
| LVD detection threshold | Vlevel | 3 | 3.1 | 3.2 | V | LVD_CR.VTDS=1101 | 47 |
| LVD detection threshold | Vlevel | 3.1 | 3.2 | 3.3 | V | LVD_CR.VTDS=1110 | 47 |
| LVD detection threshold | Vlevel | 3.2 | 3.3 | 3.4 | V | LVD_CR.VTDS=1111 | 47 |
| Internal 2.5V Reference Voltage | VREF25 | 2.475 | 2.5 | 2.525 | V | 常温25°C 3.3V | 48 |
| Internal 2.5V Reference Voltage | VREF25 | 2.463 | 2.5 | 2.525 | V | -40~85°C 2.8~5.5V | 48 |
| Internal 1.5V Reference Voltage | VREF15 | 1.485 | 1.5 | 1.515 | V | 常温25°C 3.3V | 48 |
| Internal 1.5V Reference Voltage | VREF15 | 1.477 | 1.5 | 1.519 | V | -40~85°C 1.8~5.5V | 48 |
| Internal 2.5V 1.5V temperature coefficient | TCoeff | | | 120 | ppm/°C | -40 ~ 85°C | 48 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, RCH clock source) | IDD | | 1000 | 1300 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 4M | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, RCH clock source) | IDD | | 1910 | 2420 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 8M | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, RCH clock source) | IDD | | 3650 | 4590 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 16M | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, RCH clock source) | IDD | | 5080 | 6330 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 22.12M | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, RCH clock source) | IDD | | 5440 | 6820 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 24M | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH4M) | IDD | | 3960 | 4850 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 16M | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH4M) | IDD | | 5700 | 7000 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 24M | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH4M) | IDD | | 6600 | 7480 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 32M FlashWait=1 | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH4M) | IDD | | 8140 | 9190 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 40M FlashWait=1 | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH4M) | IDD | | 9550 | 10860 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 48M FlashWait=1 | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH8M) | IDD | | 4030 | 4940 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to xxM clock source; 16M | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH8M) | IDD | | 5780 | 7060 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to xxM clock source; 24M | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH8M) | IDD | | 6670 | 7560 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to xxM clock source; 32M FlashWait=1 | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH8M) | IDD | | 8240 | 9340 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to xxM clock source; 40M FlashWait=1 | 49 |
| Supply current IDD (Run mode, All peripherals clock ON, Run while(1) in Flash, PLL RCH8M) | IDD | | 9630 | 10970 | μA | All peripherals clock ON, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH8M to xxM clock source; 48M FlashWait=1 | 49 |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, RCH clock source) | IDD | | 610 | 875 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 4M | 49 |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, RCH clock source) | IDD | | 1330 | 1570 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 8M | 49 |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, RCH clock source) | IDD | | 2110 | 2900 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 16M | 49 |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, RCH clock source) | IDD | | 2860 | 3860 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 22.12M | 49 |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, RCH clock source) | IDD | | 3060 | 4120 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; RCH clock source 24M | 49 |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, PLL RCH4M) | IDD | | 2360 | 3110 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 16M | 49 |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, PLL RCH4M) | IDD | | 3360 | 4330 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 24M | 49 |
| Supply current IDD (Run mode, All peripherals clock OFF, Run while(1) in Flash, PLL RCH4M) | IDD | | 3490 | 4010 | μA | All peripherals clock OFF, Run while(1) in Flash; VCAP=1.5V; VCC=1.8-5.5V; TA=N40C~85C; PLL RCH4M to xxM clock source; 32M FlashWait=1 | 49 |
## CAD (KiCad official)
- Symbol: `HC32L136J8TA-LQ48`
- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`
- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `hc32l136j8ta-lq48-etched.step` / `hc32l136j8ta-lq48-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `hc32l136j8ta-lq48.step` / `hc32l136j8ta-lq48.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [XHSC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885671884820480) (90 pp, sha256 `863554b2ffdb4447`, retrieved 2026-10-16, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/hc32l136j8ta-lq48-datasheet.pdf)