component
HC32L110C4UA-SFN20TR
Public Made by Adomby adom
XHSC Microcontrollers (MCU/MPU/SOC), WQFN-20-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271
{
"slug": "hc32l110c4ua-sfn20tr",
"version": "0.1.0",
"type": "component",
"description": "XHSC Microcontrollers (MCU/MPU/SOC), WQFN-20-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"hc32l110c4ua-sfn20tr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"hc32l110c4ua-sfn20tr.kicad_sym",
"hc32l110c4ua-sfn20tr.kicad_mod",
"hc32l110c4ua-sfn20tr.glb",
"hc32l110c4ua-sfn20tr.step",
"hc32l110c4ua-sfn20tr.lbr",
"docs/hero.png",
"docs/hc32l110c4ua-sfn20tr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"hc32l110c4ua-sfn20tr-hero.glb",
"hc32l110c4ua-sfn20tr-hero.overlay.json",
"hc32l110c4ua-sfn20tr-etched.glb"
],
"component": {
"mpn": "HC32L110C4UA-SFN20TR",
"manufacturer": "XHSC",
"package": "WQFN-20-EP(3x3)",
"pin_count": 21,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588913571937849344",
"parts": {
"symbol": "hc32l110c4ua-sfn20tr.kicad_sym",
"footprint": "hc32l110c4ua-sfn20tr.kicad_mod",
"model_3d": "hc32l110c4ua-sfn20tr-hero.glb",
"model_3d_plain": "hc32l110c4ua-sfn20tr-etched.glb",
"model_3d_step": "hc32l110c4ua-sfn20tr-etched.step",
"model_3d_step_plain": "hc32l110c4ua-sfn20tr.step",
"lbr": "hc32l110c4ua-sfn20tr.lbr"
},
"distributor_links": {
"lcsc": "C493491"
},
"distributor_check": {
"checked_at": "2026-10-19T00:11:54Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "RESETB/P00",
"type": "input",
"description": "Active-low chip reset input with a non-disconnectable pull-up (80 kΩ typ.), VIL max 0.3VCC, VIH min 0.7VCC, 200 mV Schmitt hysteresis and 100 ns filtered pulse; also usable as GPIO P00 digital input."
},
{
"number": "2",
"name": "XTHI/AIN7/VCIN7/P01",
"type": "bidirectional",
"description": "GPIO P01 that doubles as the 4-32 MHz XTH crystal oscillator input, AIN7/VCIN7 analog input, and UART0_RXD, I2C_SDA and timer functions."
},
{
"number": "3",
"name": "XTHO/AIN8/P02",
"type": "bidirectional",
"description": "GPIO P02 that doubles as the 4-32 MHz XTH crystal oscillator output and AIN8 analog input, also UART0_TXD and I2C_SCL."
},
{
"number": "4",
"name": "AVSS/DVSS",
"type": "power_in",
"description": "Chip ground; all VSS pins must be connected to the external supply system within its allowed range."
},
{
"number": "5",
"name": "VCAP",
"type": "power_out",
"description": "LDO core supply output for internal circuits only; a 4.7uF capacitor must be connected to it."
},
{
"number": "6",
"name": "AVCC/DVCC",
"type": "power_in",
"description": "Chip power supply, 1.8 V to 5.5 V; decoupling capacitors must be placed as close as possible to this pin."
},
{
"number": "7",
"name": "LVDIN1/P03",
"type": "bidirectional",
"description": "GPIO P03 that doubles as LVDIN1 analog monitoring input for the LVD, plus PCA, SPI_CS, Timer6, LPTimer, RTC_1HZ and VC0_OUT functions."
},
{
"number": "8",
"name": "XTLO/P15",
"type": "bidirectional",
"description": "GPIO P15 that doubles as the 32.768 kHz XTL crystal oscillator output, also I2C_SDA, UART0_RXD and LVD_OUT."
},
{
"number": "9",
"name": "XTLI/P14",
"type": "bidirectional",
"description": "GPIO P14 that doubles as the 32.768 kHz XTL crystal oscillator input, also I2C_SCL, PCA external clock input (ECI) and ADC_RDY."
},
{
"number": "10",
"name": "LVDIN2/VCIN0/P23",
"type": "bidirectional",
"description": "GPIO P23 that doubles as LVDIN2/VC0 analog input, also PCA_CH0, SPI_MISO, UART1_TXD and 38 kHz IR carrier output (IR_OUT)."
},
{
"number": "11",
"name": "P24/AIN0",
"type": "bidirectional",
"description": "GPIO P24 that doubles as AIN0 analog input, also VC1_OUT, SPI_MOSI, UART1_RXD and HCLK_OUT."
},
{
"number": "12",
"name": "P25/LVDIN3/VC1",
"type": "bidirectional",
"description": "GPIO P25 that doubles as LVDIN3/VC1 analog input, also LVD_OUT, LPUART_RXD and I2C_SDA."
},
{
"number": "13",
"name": "P26/AIN1",
"type": "bidirectional",
"description": "GPIO P26 that doubles as AIN1 analog input, also SPI_MOSI, LPUART_TXD and I2C_SCL."
},
{
"number": "14",
"name": "P27/SWDIO",
"type": "bidirectional",
"description": "GPIO P27 that doubles as the SWDIO serial-wire debug data pin; the datasheet lists P27/P31 as an alternative SWD/ISP programming interface."
},
{
"number": "15",
"name": "P31/SWCLK",
"type": "bidirectional",
"description": "GPIO P31 that doubles as the SWCLK serial-wire debug clock pin, also usable for SWD/ISP programming alongside P27."
},
{
"number": "16",
"name": "P32/AIN2/VCIN2",
"type": "bidirectional",
"description": "GPIO P32 that doubles as AIN2/VC2 analog input, also RTC_1HZ, UART1_TXD and VC1OUT."
},
{
"number": "17",
"name": "P33/AIN3/VCIN3",
"type": "bidirectional",
"description": "GPIO P33 that doubles as AIN3/VC3 analog input, also UART1_RXD, LPUART_RXD and XTL_OUT (32K oscillator output)."
},
{
"number": "18",
"name": "AIN4/VCIN4/P34",
"type": "bidirectional",
"description": "GPIO P34 that doubles as AIN4/VC4 analog input, also RTC_1HZ, LPUART_TXD and TIM0_EXT."
},
{
"number": "19",
"name": "AIN5/VCIN5/P35",
"type": "bidirectional",
"description": "GPIO P35 that doubles as AIN5/VC5 analog input; the datasheet recommends reserving P35 and P36 as the ISP programming interface, also UART1_TXD, UART0_TXD and I2C_SDA."
},
{
"number": "20",
"name": "AIN6/VCIN6/AVREF/P36",
"type": "bidirectional",
"description": "GPIO P36 that doubles as AIN6/VC6 analog input and AVREF external reference input, also UART1_RXD, UART0_RXD and I2C_SCL; the datasheet recommends reserving P35/P36 as the ISP programming interface."
},
{
"number": "21",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed thermal pad is not given a pin number in the datasheet text. Per the note on page 18 it ; Pin types are KiCad classes assigned by me. Every GPIO-muxed pin is typed bidirectional, including c; The ordering code suffix SFN20TR maps to the QFN20(3*3) package, tape-and-reel, on page 67. The pin ",
"exposed pad 21 added from the footprint"
],
"pages_sent": 46,
"cost_usd": 0.1657,
"at": "2026-10-19T00:10:06"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588913571937849344",
"pages": 69,
"sha256": "9ca08dbf01e4bbb9",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 21,
"described": 21,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "hc32l110c4ua-sfn20tr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
3.0,
3.0,
0.52
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "0ee4e1082236390795238cd34b082d96efd160d6292c636cc40201a5a30cdc63",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "hc32l110c4ua-sfn20tr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
3.0,
3.0,
0.52
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "280ab1be4fd509c6018a75fbe03c953e8a0de5c411f56962f16949365d90b495",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}